blob: 8effc5d520eb3026e0802229fa1c90e01dca2efe [file] [log] [blame]
wdenkf8062712005-01-09 23:16:25 +00001/*
2 * Basic I2C functions
3 *
4 * Copyright (c) 2004 Texas Instruments
5 *
6 * This package is free software; you can redistribute it and/or
7 * modify it under the terms of the license found in the file
8 * named COPYING that should have accompanied this file.
9 *
10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
13 *
14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments
15 *
16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17 * Rewritten to fit into the current U-Boot framework
18 *
19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
20 *
21 */
22
23#include <common.h>
wdenkcb99da52005-01-12 00:15:14 +000024
wdenkf8062712005-01-09 23:16:25 +000025#include <asm/arch/i2c.h>
26#include <asm/io.h>
27
Steve Sakoman10acc712010-06-12 06:42:57 -070028#include "omap24xx_i2c.h"
29
John Rigby0d21ed02010-12-20 18:27:51 -070030DECLARE_GLOBAL_DATA_PTR;
31
Steve Sakomanfb5c39a2010-10-20 06:07:44 -070032#define I2C_TIMEOUT 1000
Steve Sakomane2bdc132010-07-19 20:31:55 -070033
wdenkf8062712005-01-09 23:16:25 +000034static void wait_for_bb (void);
35static u16 wait_for_pin (void);
Wolfgang Denke1e46792005-09-25 18:41:04 +020036static void flush_fifo(void);
wdenkf8062712005-01-09 23:16:25 +000037
Dirk Behme7a8f6572009-11-02 20:36:26 +010038static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
39
40static unsigned int bus_initialized[I2C_BUS_MAX];
41static unsigned int current_bus;
42
wdenkf8062712005-01-09 23:16:25 +000043void i2c_init (int speed, int slaveadd)
44{
Tom Rix03b2a742009-06-28 12:52:27 -050045 int psc, fsscll, fssclh;
46 int hsscll = 0, hssclh = 0;
47 u32 scll, sclh;
Steve Sakomane2bdc132010-07-19 20:31:55 -070048 int timeout = I2C_TIMEOUT;
Tom Rix03b2a742009-06-28 12:52:27 -050049
50 /* Only handle standard, fast and high speeds */
51 if ((speed != OMAP_I2C_STANDARD) &&
52 (speed != OMAP_I2C_FAST_MODE) &&
53 (speed != OMAP_I2C_HIGH_SPEED)) {
54 printf("Error : I2C unsupported speed %d\n", speed);
55 return;
56 }
57
58 psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
59 psc -= 1;
60 if (psc < I2C_PSC_MIN) {
61 printf("Error : I2C unsupported prescalar %d\n", psc);
62 return;
63 }
64
65 if (speed == OMAP_I2C_HIGH_SPEED) {
66 /* High speed */
67
68 /* For first phase of HS mode */
69 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
70 (2 * OMAP_I2C_FAST_MODE);
71
72 fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
73 fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
74 if (((fsscll < 0) || (fssclh < 0)) ||
75 ((fsscll > 255) || (fssclh > 255))) {
76 printf("Error : I2C initializing first phase clock\n");
77 return;
78 }
79
80 /* For second phase of HS mode */
81 hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
82
83 hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
84 hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
85 if (((fsscll < 0) || (fssclh < 0)) ||
86 ((fsscll > 255) || (fssclh > 255))) {
87 printf("Error : I2C initializing second phase clock\n");
88 return;
89 }
90
91 scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
92 sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh;
93
94 } else {
95 /* Standard and fast speed */
96 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
97
98 fsscll -= I2C_FASTSPEED_SCLL_TRIM;
99 fssclh -= I2C_FASTSPEED_SCLH_TRIM;
100 if (((fsscll < 0) || (fssclh < 0)) ||
101 ((fsscll > 255) || (fssclh > 255))) {
102 printf("Error : I2C initializing clock\n");
103 return;
104 }
105
106 scll = (unsigned int)fsscll;
107 sclh = (unsigned int)fssclh;
108 }
wdenkf8062712005-01-09 23:16:25 +0000109
Dirk Behme7a8f6572009-11-02 20:36:26 +0100110 if (readw (&i2c_base->con) & I2C_CON_EN) {
111 writew (0, &i2c_base->con);
wdenkf8062712005-01-09 23:16:25 +0000112 udelay (50000);
113 }
114
Steve Sakomane2bdc132010-07-19 20:31:55 -0700115 writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */
116 udelay(1000);
117
118 writew(I2C_CON_EN, &i2c_base->con);
119 while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
120 if (timeout <= 0) {
121 printf("ERROR: Timeout in soft-reset\n");
122 return;
123 }
124 udelay(1000);
125 }
126
127 writew(0, &i2c_base->con);
Dirk Behme7a8f6572009-11-02 20:36:26 +0100128 writew(psc, &i2c_base->psc);
129 writew(scll, &i2c_base->scll);
130 writew(sclh, &i2c_base->sclh);
Tom Rix03b2a742009-06-28 12:52:27 -0500131
wdenkf8062712005-01-09 23:16:25 +0000132 /* own address */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100133 writew (slaveadd, &i2c_base->oa);
134 writew (I2C_CON_EN, &i2c_base->con);
Wolfgang Denke1e46792005-09-25 18:41:04 +0200135
wdenkf8062712005-01-09 23:16:25 +0000136 /* have to enable intrrupts or OMAP i2c module doesn't work */
Dirk Behme5a6dc872008-11-10 20:15:25 +0100137 writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
Dirk Behme7a8f6572009-11-02 20:36:26 +0100138 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
wdenkf8062712005-01-09 23:16:25 +0000139 udelay (1000);
Wolfgang Denke1e46792005-09-25 18:41:04 +0200140 flush_fifo();
Dirk Behme7a8f6572009-11-02 20:36:26 +0100141 writew (0xFFFF, &i2c_base->stat);
142 writew (0, &i2c_base->cnt);
143
Heiko Schocher2afe3142010-09-17 13:10:37 +0200144 if (gd->flags & GD_FLG_RELOC)
145 bus_initialized[current_bus] = 1;
wdenkf8062712005-01-09 23:16:25 +0000146}
147
148static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
149{
150 int i2c_error = 0;
151 u16 status;
152
153 /* wait until bus not busy */
154 wait_for_bb ();
155
156 /* one byte only */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100157 writew (1, &i2c_base->cnt);
wdenkf8062712005-01-09 23:16:25 +0000158 /* set slave address */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100159 writew (devaddr, &i2c_base->sa);
wdenkf8062712005-01-09 23:16:25 +0000160 /* no stop bit needed here */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100161 writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, &i2c_base->con);
wdenkf8062712005-01-09 23:16:25 +0000162
Steve Sakoman519effe2010-10-20 06:07:45 -0700163 /* send register offset */
164 while (1) {
165 status = wait_for_pin();
166 if (status == 0 || status & I2C_STAT_NACK) {
wdenkf8062712005-01-09 23:16:25 +0000167 i2c_error = 1;
Steve Sakoman519effe2010-10-20 06:07:45 -0700168 goto read_exit;
wdenkf8062712005-01-09 23:16:25 +0000169 }
Steve Sakoman519effe2010-10-20 06:07:45 -0700170 if (status & I2C_STAT_XRDY) {
171 /* Important: have to use byte access */
172 writeb(regoffset, &i2c_base->data);
173 writew(I2C_STAT_XRDY, &i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000174 }
Steve Sakoman519effe2010-10-20 06:07:45 -0700175 if (status & I2C_STAT_ARDY) {
176 writew(I2C_STAT_ARDY, &i2c_base->stat);
177 break;
178 }
179 }
wdenkf8062712005-01-09 23:16:25 +0000180
Steve Sakoman519effe2010-10-20 06:07:45 -0700181 /* set slave address */
182 writew(devaddr, &i2c_base->sa);
183 /* read one byte from slave */
184 writew(1, &i2c_base->cnt);
185 /* need stop bit here */
186 writew(I2C_CON_EN | I2C_CON_MST |
187 I2C_CON_STT | I2C_CON_STP,
188 &i2c_base->con);
wdenkf8062712005-01-09 23:16:25 +0000189
Steve Sakoman519effe2010-10-20 06:07:45 -0700190 /* receive data */
191 while (1) {
192 status = wait_for_pin();
193 if (status == 0 || status & I2C_STAT_NACK) {
194 i2c_error = 1;
195 goto read_exit;
196 }
wdenkf8062712005-01-09 23:16:25 +0000197 if (status & I2C_STAT_RRDY) {
Steve Sakoman10acc712010-06-12 06:42:57 -0700198#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
199 defined(CONFIG_OMAP44XX)
Steve Sakoman519effe2010-10-20 06:07:45 -0700200 *value = readb(&i2c_base->data);
Dirk Behme5648e512008-12-14 09:47:18 +0100201#else
Steve Sakoman519effe2010-10-20 06:07:45 -0700202 *value = readw(&i2c_base->data);
Dirk Behme5648e512008-12-14 09:47:18 +0100203#endif
Steve Sakoman519effe2010-10-20 06:07:45 -0700204 writew(I2C_STAT_RRDY, &i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000205 }
Steve Sakoman519effe2010-10-20 06:07:45 -0700206 if (status & I2C_STAT_ARDY) {
207 writew(I2C_STAT_ARDY, &i2c_base->stat);
208 break;
wdenkf8062712005-01-09 23:16:25 +0000209 }
210 }
Steve Sakoman519effe2010-10-20 06:07:45 -0700211
212read_exit:
wdenkf8062712005-01-09 23:16:25 +0000213 flush_fifo();
Dirk Behme7a8f6572009-11-02 20:36:26 +0100214 writew (0xFFFF, &i2c_base->stat);
215 writew (0, &i2c_base->cnt);
wdenkf8062712005-01-09 23:16:25 +0000216 return i2c_error;
217}
218
Wolfgang Denke1e46792005-09-25 18:41:04 +0200219static void flush_fifo(void)
wdenkf8062712005-01-09 23:16:25 +0000220{ u16 stat;
wdenk2e405bf2005-01-10 00:01:04 +0000221
222 /* note: if you try and read data when its not there or ready
223 * you get a bus error
224 */
wdenkf8062712005-01-09 23:16:25 +0000225 while(1){
Dirk Behme7a8f6572009-11-02 20:36:26 +0100226 stat = readw(&i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000227 if(stat == I2C_STAT_RRDY){
Steve Sakoman10acc712010-06-12 06:42:57 -0700228#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
229 defined(CONFIG_OMAP44XX)
Dirk Behme7a8f6572009-11-02 20:36:26 +0100230 readb(&i2c_base->data);
Dirk Behme5648e512008-12-14 09:47:18 +0100231#else
Dirk Behme7a8f6572009-11-02 20:36:26 +0100232 readw(&i2c_base->data);
Dirk Behme5648e512008-12-14 09:47:18 +0100233#endif
Dirk Behme7a8f6572009-11-02 20:36:26 +0100234 writew(I2C_STAT_RRDY,&i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000235 udelay(1000);
236 }else
237 break;
238 }
239}
240
241int i2c_probe (uchar chip)
242{
Steve Sakomana91a1df2010-10-20 06:07:47 -0700243 u16 status;
wdenkf8062712005-01-09 23:16:25 +0000244 int res = 1; /* default = fail */
245
Dirk Behme7a8f6572009-11-02 20:36:26 +0100246 if (chip == readw (&i2c_base->oa)) {
wdenkf8062712005-01-09 23:16:25 +0000247 return res;
248 }
249
250 /* wait until bus not busy */
251 wait_for_bb ();
252
Nick Thompson48f7ae42011-04-11 22:37:41 +0000253 /* try to write one byte */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100254 writew (1, &i2c_base->cnt);
wdenkf8062712005-01-09 23:16:25 +0000255 /* set slave address */
Dirk Behme7a8f6572009-11-02 20:36:26 +0100256 writew (chip, &i2c_base->sa);
wdenkf8062712005-01-09 23:16:25 +0000257 /* stop bit needed here */
Nick Thompson48f7ae42011-04-11 22:37:41 +0000258 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
259 I2C_CON_STP, &i2c_base->con);
wdenkf8062712005-01-09 23:16:25 +0000260
Nick Thompson48f7ae42011-04-11 22:37:41 +0000261 status = wait_for_pin();
262
263 /* check for ACK (!NAK) */
264 if (!(status & I2C_STAT_NACK))
265 res = 0;
266
267 /* abort transfer (force idle state) */
268 writew(0, &i2c_base->con);
Steve Sakomana91a1df2010-10-20 06:07:47 -0700269
wdenkf8062712005-01-09 23:16:25 +0000270 flush_fifo();
Dirk Behme7a8f6572009-11-02 20:36:26 +0100271 writew (0, &i2c_base->cnt); /* don't allow any more data in...we don't want it.*/
272 writew(0xFFFF, &i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000273 return res;
274}
275
276int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
277{
278 int i;
279
280 if (alen > 1) {
281 printf ("I2C read: addr len %d not supported\n", alen);
282 return 1;
283 }
284
285 if (addr + len > 256) {
286 printf ("I2C read: address out of range\n");
287 return 1;
288 }
289
290 for (i = 0; i < len; i++) {
291 if (i2c_read_byte (chip, addr + i, &buffer[i])) {
292 printf ("I2C read: I/O error\n");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200293 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
wdenkf8062712005-01-09 23:16:25 +0000294 return 1;
295 }
296 }
297
298 return 0;
299}
300
301int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
302{
303 int i;
Michael Jonesbb54d572011-09-04 14:01:55 -0400304 u16 status;
305 int i2c_error = 0;
wdenkf8062712005-01-09 23:16:25 +0000306
307 if (alen > 1) {
Michael Jonesbb54d572011-09-04 14:01:55 -0400308 printf("I2C write: addr len %d not supported\n", alen);
wdenkf8062712005-01-09 23:16:25 +0000309 return 1;
310 }
311
312 if (addr + len > 256) {
Michael Jonesbb54d572011-09-04 14:01:55 -0400313 printf("I2C write: address 0x%x + 0x%x out of range\n",
314 addr, len);
wdenkf8062712005-01-09 23:16:25 +0000315 return 1;
316 }
317
Michael Jonesbb54d572011-09-04 14:01:55 -0400318 /* wait until bus not busy */
319 wait_for_bb();
320
321 /* start address phase - will write regoffset + len bytes data */
322 /* TODO consider case when !CONFIG_OMAP243X/34XX/44XX */
323 writew(alen + len, &i2c_base->cnt);
324 /* set slave address */
325 writew(chip, &i2c_base->sa);
326 /* stop bit needed here */
327 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
328 I2C_CON_STP, &i2c_base->con);
329
330 /* Send address byte */
331 status = wait_for_pin();
332
333 if (status == 0 || status & I2C_STAT_NACK) {
334 i2c_error = 1;
335 printf("error waiting for i2c address ACK (status=0x%x)\n",
336 status);
337 goto write_exit;
338 }
339
340 if (status & I2C_STAT_XRDY) {
341 writeb(addr & 0xFF, &i2c_base->data);
342 writew(I2C_STAT_XRDY, &i2c_base->stat);
343 } else {
344 i2c_error = 1;
345 printf("i2c bus not ready for transmit (status=0x%x)\n",
346 status);
347 goto write_exit;
348 }
349
350 /* address phase is over, now write data */
wdenkf8062712005-01-09 23:16:25 +0000351 for (i = 0; i < len; i++) {
Michael Jonesbb54d572011-09-04 14:01:55 -0400352 status = wait_for_pin();
353
354 if (status == 0 || status & I2C_STAT_NACK) {
355 i2c_error = 1;
356 printf("i2c error waiting for data ACK (status=0x%x)\n",
357 status);
358 goto write_exit;
359 }
360
361 if (status & I2C_STAT_XRDY) {
362 writeb(buffer[i], &i2c_base->data);
363 writew(I2C_STAT_XRDY, &i2c_base->stat);
364 } else {
365 i2c_error = 1;
366 printf("i2c bus not ready for Tx (i=%d)\n", i);
367 goto write_exit;
wdenkf8062712005-01-09 23:16:25 +0000368 }
369 }
370
Michael Jonesbb54d572011-09-04 14:01:55 -0400371write_exit:
372 flush_fifo();
373 writew(0xFFFF, &i2c_base->stat);
374 return i2c_error;
wdenkf8062712005-01-09 23:16:25 +0000375}
376
377static void wait_for_bb (void)
378{
Steve Sakomanfb5c39a2010-10-20 06:07:44 -0700379 int timeout = I2C_TIMEOUT;
wdenkf8062712005-01-09 23:16:25 +0000380 u16 stat;
381
Michael Jones9c5ef8d2011-07-14 22:09:28 +0000382 writew(0xFFFF, &i2c_base->stat); /* clear current interrupts...*/
Dirk Behme7a8f6572009-11-02 20:36:26 +0100383 while ((stat = readw (&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
384 writew (stat, &i2c_base->stat);
Steve Sakomanfb5c39a2010-10-20 06:07:44 -0700385 udelay(1000);
wdenkf8062712005-01-09 23:16:25 +0000386 }
387
388 if (timeout <= 0) {
389 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
Dirk Behme7a8f6572009-11-02 20:36:26 +0100390 readw (&i2c_base->stat));
wdenkf8062712005-01-09 23:16:25 +0000391 }
Dirk Behme7a8f6572009-11-02 20:36:26 +0100392 writew(0xFFFF, &i2c_base->stat); /* clear delayed stuff*/
wdenkf8062712005-01-09 23:16:25 +0000393}
394
395static u16 wait_for_pin (void)
396{
397 u16 status;
Steve Sakomanfb5c39a2010-10-20 06:07:44 -0700398 int timeout = I2C_TIMEOUT;
wdenkf8062712005-01-09 23:16:25 +0000399
400 do {
401 udelay (1000);
Dirk Behme7a8f6572009-11-02 20:36:26 +0100402 status = readw (&i2c_base->stat);
wdenkf8062712005-01-09 23:16:25 +0000403 } while ( !(status &
404 (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
405 I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
406 I2C_STAT_AL)) && timeout--);
407
408 if (timeout <= 0) {
409 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
Dirk Behme7a8f6572009-11-02 20:36:26 +0100410 readw (&i2c_base->stat));
Steve Sakomanfb5c39a2010-10-20 06:07:44 -0700411 writew(0xFFFF, &i2c_base->stat);
412 status = 0;
413 }
414
wdenkf8062712005-01-09 23:16:25 +0000415 return status;
416}
Dirk Behme7a8f6572009-11-02 20:36:26 +0100417
418int i2c_set_bus_num(unsigned int bus)
419{
420 if ((bus < 0) || (bus >= I2C_BUS_MAX)) {
421 printf("Bad bus: %d\n", bus);
422 return -1;
423 }
424
425#if I2C_BUS_MAX==3
426 if (bus == 2)
427 i2c_base = (struct i2c *)I2C_BASE3;
428 else
429#endif
430 if (bus == 1)
431 i2c_base = (struct i2c *)I2C_BASE2;
432 else
433 i2c_base = (struct i2c *)I2C_BASE1;
434
435 current_bus = bus;
436
437 if(!bus_initialized[current_bus])
438 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
439
440 return 0;
441}
Steve Sakoman10acc712010-06-12 06:42:57 -0700442
443int i2c_get_bus_num(void)
444{
445 return (int) current_bus;
446}