Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <clk.h> |
| 8 | #include <dm.h> |
| 9 | #include <fdt_support.h> |
| 10 | #include <asm/io.h> |
| 11 | |
| 12 | phys_size_t get_effective_memsize(void) |
| 13 | { |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame^] | 14 | return CFG_SYS_SDRAM_SIZE; |
Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 15 | } |
| 16 | |
Sean Anderson | 628b5dc | 2021-04-08 22:13:10 -0400 | [diff] [blame] | 17 | static int sram_init(void) |
Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 18 | { |
| 19 | int ret, i; |
Sean Anderson | 7be6d2b | 2021-04-08 22:13:11 -0400 | [diff] [blame] | 20 | const char * const banks[] = { "sram0", "sram1", "aisram" }; |
Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 21 | ofnode memory; |
| 22 | struct clk clk; |
| 23 | |
| 24 | /* Enable RAM clocks */ |
Damien Le Moal | 6e5a8b7 | 2022-03-01 10:35:39 +0000 | [diff] [blame] | 25 | memory = ofnode_by_compatible(ofnode_null(), "canaan,k210-sram"); |
Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 26 | if (ofnode_equal(memory, ofnode_null())) |
| 27 | return -ENOENT; |
| 28 | |
| 29 | for (i = 0; i < ARRAY_SIZE(banks); i++) { |
| 30 | ret = clk_get_by_name_nodev(memory, banks[i], &clk); |
| 31 | if (ret) |
| 32 | continue; |
| 33 | |
| 34 | ret = clk_enable(&clk); |
| 35 | clk_free(&clk); |
| 36 | if (ret) |
| 37 | return ret; |
| 38 | } |
| 39 | |
Sean Anderson | 628b5dc | 2021-04-08 22:13:10 -0400 | [diff] [blame] | 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | int board_early_init_f(void) |
| 44 | { |
| 45 | return sram_init(); |
| 46 | } |
| 47 | |
| 48 | int board_init(void) |
| 49 | { |
Sean Anderson | edc32ab | 2020-06-24 06:41:25 -0400 | [diff] [blame] | 50 | return 0; |
| 51 | } |