blob: f13dfc1551652afa4cf969a48b71c96f1c086974 [file] [log] [blame]
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019-2020 NXP.
4 */
5
6/*
7 * Configuration of the Tamper pins in different mode:
8 * - default (no tamper pins): _default_
9 * - passive mode expecting VCC on the line: "_passive_vcc_"
10 * - passive mode expecting VCC on the line: "_passive_gnd_"
11 * - active mode: "_active_"
12 */
13
14#include <command.h>
15#include <log.h>
16#include <stddef.h>
Peng Fan2e0644a2023-04-28 12:08:09 +080017#include <firmware/imx/sci/sci.h>
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +020018#include <asm/arch-imx8/imx8-pins.h>
19#include <asm/arch-imx8/snvs_security_sc.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +020021
22/* Access to gd */
23DECLARE_GLOBAL_DATA_PTR;
24
25#define SC_WRITE_CONF 1
26
27#define PGD_HEX_VALUE 0x41736166
28#define SRTC_EN 0x1
29#define DP_EN BIT(5)
30
31struct snvs_security_sc_conf {
32 struct snvs_hp_conf {
33 u32 lock; /* HPLR - HP Lock */
34 u32 __cmd; /* HPCOMR - HP Command */
35 u32 __ctl; /* HPCR - HP Control */
36 u32 secvio_intcfg; /* HPSICR - Security Violation Int
37 * Config
38 */
39 u32 secvio_ctl; /* HPSVCR - Security Violation Control*/
40 u32 status; /* HPSR - HP Status */
41 u32 secvio_status; /* HPSVSR - Security Violation Status */
42 u32 __ha_counteriv; /* High Assurance Counter IV */
43 u32 __ha_counter; /* High Assurance Counter */
44 u32 __rtc_msb; /* Real Time Clock/Counter MSB */
45 u32 __rtc_lsb; /* Real Time Counter LSB */
46 u32 __time_alarm_msb; /* Time Alarm MSB */
47 u32 __time_alarm_lsb; /* Time Alarm LSB */
48 } hp;
49 struct snvs_lp_conf {
50 u32 lock;
51 u32 __ctl;
52 u32 __mstr_key_ctl; /* Master Key Control */
53 u32 secvio_ctl; /* Security Violation Control */
54 u32 tamper_filt_cfg; /* Tamper Glitch Filters Configuration*/
55 u32 tamper_det_cfg; /* Tamper Detectors Configuration */
56 u32 status;
57 u32 __srtc_msb; /* Secure Real Time Clock/Counter MSB */
58 u32 __srtc_lsb; /* Secure Real Time Clock/Counter LSB */
59 u32 __time_alarm; /* Time Alarm */
60 u32 __smc_msb; /* Secure Monotonic Counter MSB */
61 u32 __smc_lsb; /* Secure Monotonic Counter LSB */
62 u32 __pwr_glitch_det; /* Power Glitch Detector */
63 u32 __gen_purpose;
64 u8 __zmk[32]; /* Zeroizable Master Key */
65 u32 __rsvd0;
66 u32 __gen_purposes[4]; /* gp0_30 to gp0_33 */
67 u32 tamper_det_cfg2; /* Tamper Detectors Configuration2 */
68 u32 tamper_det_status; /* Tamper Detectors status */
69 u32 tamper_filt1_cfg; /* Tamper Glitch Filter1 Configuration*/
70 u32 tamper_filt2_cfg; /* Tamper Glitch Filter2 Configuration*/
71 u32 __rsvd1[4];
72 u32 act_tamper1_cfg; /* Active Tamper1 Configuration */
73 u32 act_tamper2_cfg; /* Active Tamper2 Configuration */
74 u32 act_tamper3_cfg; /* Active Tamper3 Configuration */
75 u32 act_tamper4_cfg; /* Active Tamper4 Configuration */
76 u32 act_tamper5_cfg; /* Active Tamper5 Configuration */
77 u32 __rsvd2[3];
78 u32 act_tamper_ctl; /* Active Tamper Control */
79 u32 act_tamper_clk_ctl; /* Active Tamper Clock Control */
80 u32 act_tamper_routing_ctl1;/* Active Tamper Routing Control1 */
81 u32 act_tamper_routing_ctl2;/* Active Tamper Routing Control2 */
82 } lp;
83};
84
85static struct snvs_security_sc_conf snvs_default_config = {
86 .hp = {
87 .lock = 0x1f0703ff,
88 .secvio_ctl = 0x3000007f,
89 },
90 .lp = {
91 .lock = 0x1f0003ff,
92 .secvio_ctl = 0x36,
93 .tamper_filt_cfg = 0,
94 .tamper_det_cfg = 0x76, /* analogic tampers
95 * + rollover tampers
96 */
97 .tamper_det_cfg2 = 0,
98 .tamper_filt1_cfg = 0,
99 .tamper_filt2_cfg = 0,
100 .act_tamper1_cfg = 0,
101 .act_tamper2_cfg = 0,
102 .act_tamper3_cfg = 0,
103 .act_tamper4_cfg = 0,
104 .act_tamper5_cfg = 0,
105 .act_tamper_ctl = 0,
106 .act_tamper_clk_ctl = 0,
107 .act_tamper_routing_ctl1 = 0,
108 .act_tamper_routing_ctl2 = 0,
109 }
110};
111
112static struct snvs_security_sc_conf snvs_passive_vcc_config = {
113 .hp = {
114 .lock = 0x1f0703ff,
115 .secvio_ctl = 0x3000007f,
116 },
117 .lp = {
118 .lock = 0x1f0003ff,
119 .secvio_ctl = 0x36,
120 .tamper_filt_cfg = 0,
121 .tamper_det_cfg = 0x276, /* ET1 will trig on line at GND
122 * + analogic tampers
123 * + rollover tampers
124 */
125 .tamper_det_cfg2 = 0,
126 .tamper_filt1_cfg = 0,
127 .tamper_filt2_cfg = 0,
128 .act_tamper1_cfg = 0,
129 .act_tamper2_cfg = 0,
130 .act_tamper3_cfg = 0,
131 .act_tamper4_cfg = 0,
132 .act_tamper5_cfg = 0,
133 .act_tamper_ctl = 0,
134 .act_tamper_clk_ctl = 0,
135 .act_tamper_routing_ctl1 = 0,
136 .act_tamper_routing_ctl2 = 0,
137 }
138};
139
140static struct snvs_security_sc_conf snvs_passive_gnd_config = {
141 .hp = {
142 .lock = 0x1f0703ff,
143 .secvio_ctl = 0x3000007f,
144 },
145 .lp = {
146 .lock = 0x1f0003ff,
147 .secvio_ctl = 0x36,
148 .tamper_filt_cfg = 0,
149 .tamper_det_cfg = 0xa76, /* ET1 will trig on line at VCC
150 * + analogic tampers
151 * + rollover tampers
152 */
153 .tamper_det_cfg2 = 0,
154 .tamper_filt1_cfg = 0,
155 .tamper_filt2_cfg = 0,
156 .act_tamper1_cfg = 0,
157 .act_tamper2_cfg = 0,
158 .act_tamper3_cfg = 0,
159 .act_tamper4_cfg = 0,
160 .act_tamper5_cfg = 0,
161 .act_tamper_ctl = 0,
162 .act_tamper_clk_ctl = 0,
163 .act_tamper_routing_ctl1 = 0,
164 .act_tamper_routing_ctl2 = 0,
165 }
166};
167
168static struct snvs_security_sc_conf snvs_active_config = {
169 .hp = {
170 .lock = 0x1f0703ff,
171 .secvio_ctl = 0x3000007f,
172 },
173 .lp = {
174 .lock = 0x1f0003ff,
175 .secvio_ctl = 0x36,
176 .tamper_filt_cfg = 0x00800000, /* Enable filtering */
177 .tamper_det_cfg = 0x276, /* ET1 enabled + analogic tampers
178 * + rollover tampers
179 */
180 .tamper_det_cfg2 = 0,
181 .tamper_filt1_cfg = 0,
182 .tamper_filt2_cfg = 0,
183 .act_tamper1_cfg = 0x84001111,
184 .act_tamper2_cfg = 0,
185 .act_tamper3_cfg = 0,
186 .act_tamper4_cfg = 0,
187 .act_tamper5_cfg = 0,
188 .act_tamper_ctl = 0x00010001,
189 .act_tamper_clk_ctl = 0,
190 .act_tamper_routing_ctl1 = 0x1,
191 .act_tamper_routing_ctl2 = 0,
192 }
193};
194
195static struct snvs_security_sc_conf *get_snvs_config(void)
196{
197 return &snvs_default_config;
198}
199
200struct snvs_dgo_conf {
201 u32 tamper_offset_ctl;
202 u32 tamper_pull_ctl;
203 u32 tamper_ana_test_ctl;
204 u32 tamper_sensor_trim_ctl;
205 u32 tamper_misc_ctl;
206 u32 tamper_core_volt_mon_ctl;
207};
208
209static struct snvs_dgo_conf snvs_dgo_default_config = {
210 .tamper_misc_ctl = 0x80000000, /* Lock the DGO */
211};
212
213static struct snvs_dgo_conf snvs_dgo_passive_vcc_config = {
214 .tamper_misc_ctl = 0x80000000, /* Lock the DGO */
215 .tamper_pull_ctl = 0x00000001, /* Pull down ET1 */
216 .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
217};
218
219static struct snvs_dgo_conf snvs_dgo_passive_gnd_config = {
220 .tamper_misc_ctl = 0x80000000, /* Lock the DGO */
221 .tamper_pull_ctl = 0x00000401, /* Pull up ET1 */
222 .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
223};
224
225static struct snvs_dgo_conf snvs_dgo_active_config = {
226 .tamper_misc_ctl = 0x80000000, /* Lock the DGO */
227 .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
228};
229
230static struct snvs_dgo_conf *get_snvs_dgo_config(void)
231{
232 return &snvs_dgo_default_config;
233}
234
235struct tamper_pin_cfg {
236 u32 pad;
237 u32 mux_conf;
238};
239
240static struct tamper_pin_cfg tamper_pin_list_default_config[] = {
241 {SC_P_CSI_D00, 0}, /* Tamp_Out0 */
242 {SC_P_CSI_D01, 0}, /* Tamp_Out1 */
243 {SC_P_CSI_D02, 0}, /* Tamp_Out2 */
244 {SC_P_CSI_D03, 0}, /* Tamp_Out3 */
245 {SC_P_CSI_D04, 0}, /* Tamp_Out4 */
246 {SC_P_CSI_D05, 0}, /* Tamp_In0 */
247 {SC_P_CSI_D06, 0}, /* Tamp_In1 */
248 {SC_P_CSI_D07, 0}, /* Tamp_In2 */
249 {SC_P_CSI_HSYNC, 0}, /* Tamp_In3 */
250 {SC_P_CSI_VSYNC, 0}, /* Tamp_In4 */
251};
252
253static struct tamper_pin_cfg tamper_pin_list_passive_vcc_config[] = {
254 {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
255};
256
257static struct tamper_pin_cfg tamper_pin_list_passive_gnd_config[] = {
258 {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
259};
260
261static struct tamper_pin_cfg tamper_pin_list_active_config[] = {
262 {SC_P_CSI_D00, 0x1a000060}, /* Tamp_Out0 */ /* Sel tamper + OD */
263 {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
264};
265
266#define TAMPER_PIN_LIST_CHOSEN tamper_pin_list_default_config
267
268static struct tamper_pin_cfg *get_tamper_pin_cfg_list(u32 *size)
269{
270 *size = sizeof(TAMPER_PIN_LIST_CHOSEN) /
271 sizeof(TAMPER_PIN_LIST_CHOSEN[0]);
272
273 return TAMPER_PIN_LIST_CHOSEN;
274}
275
276#define SC_CONF_OFFSET_OF(_field) \
277 (offsetof(struct snvs_security_sc_conf, _field))
278
279static u32 ptr_value(u32 *_p)
280{
281 return (_p) ? *_p : 0xdeadbeef;
282}
283
284static int check_write_secvio_config(u32 id, u32 *_p1, u32 *_p2,
285 u32 *_p3, u32 *_p4, u32 *_p5,
286 u32 _cnt)
287{
Peng Fan25b7eb42023-06-15 18:08:58 +0800288 int err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200289 u32 d1 = ptr_value(_p1);
290 u32 d2 = ptr_value(_p2);
291 u32 d3 = ptr_value(_p3);
292 u32 d4 = ptr_value(_p4);
293 u32 d5 = ptr_value(_p5);
294
Peng Fan25b7eb42023-06-15 18:08:58 +0800295 err = sc_seco_secvio_config(-1, id, SC_WRITE_CONF, &d1, &d2, &d3, &d4, &d4, _cnt);
296 if (err) {
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200297 printf("Failed to set secvio configuration\n");
298 debug("Failed to set conf id 0x%x with values ", id);
299 debug("0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x (cnt: %d)\n",
300 d1, d2, d3, d4, d5, _cnt);
301 goto exit;
302 }
303
304 if (_p1)
305 *(u32 *)_p1 = d1;
306 if (_p2)
307 *(u32 *)_p2 = d2;
308 if (_p3)
309 *(u32 *)_p3 = d3;
310 if (_p4)
311 *(u32 *)_p4 = d4;
312 if (_p5)
313 *(u32 *)_p5 = d5;
314
315exit:
Peng Fan25b7eb42023-06-15 18:08:58 +0800316 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200317}
318
319#define SC_CHECK_WRITE1(id, _p1) \
320 check_write_secvio_config(id, _p1, NULL, NULL, NULL, NULL, 1)
321
322static int apply_snvs_config(struct snvs_security_sc_conf *cnf)
323{
Peng Fan25b7eb42023-06-15 18:08:58 +0800324 int err = 0;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200325
326 debug("%s\n", __func__);
327
328 debug("Applying config:\n"
329 "\thp.lock = 0x%.8x\n"
330 "\thp.secvio_ctl = 0x%.8x\n"
331 "\tlp.lock = 0x%.8x\n"
332 "\tlp.secvio_ctl = 0x%.8x\n"
333 "\tlp.tamper_filt_cfg = 0x%.8x\n"
334 "\tlp.tamper_det_cfg = 0x%.8x\n"
335 "\tlp.tamper_det_cfg2 = 0x%.8x\n"
336 "\tlp.tamper_filt1_cfg = 0x%.8x\n"
337 "\tlp.tamper_filt2_cfg = 0x%.8x\n"
338 "\tlp.act_tamper1_cfg = 0x%.8x\n"
339 "\tlp.act_tamper2_cfg = 0x%.8x\n"
340 "\tlp.act_tamper3_cfg = 0x%.8x\n"
341 "\tlp.act_tamper4_cfg = 0x%.8x\n"
342 "\tlp.act_tamper5_cfg = 0x%.8x\n"
343 "\tlp.act_tamper_ctl = 0x%.8x\n"
344 "\tlp.act_tamper_clk_ctl = 0x%.8x\n"
345 "\tlp.act_tamper_routing_ctl1 = 0x%.8x\n"
346 "\tlp.act_tamper_routing_ctl2 = 0x%.8x\n",
347 cnf->hp.lock,
348 cnf->hp.secvio_ctl,
349 cnf->lp.lock,
350 cnf->lp.secvio_ctl,
351 cnf->lp.tamper_filt_cfg,
352 cnf->lp.tamper_det_cfg,
353 cnf->lp.tamper_det_cfg2,
354 cnf->lp.tamper_filt1_cfg,
355 cnf->lp.tamper_filt2_cfg,
356 cnf->lp.act_tamper1_cfg,
357 cnf->lp.act_tamper2_cfg,
358 cnf->lp.act_tamper3_cfg,
359 cnf->lp.act_tamper4_cfg,
360 cnf->lp.act_tamper5_cfg,
361 cnf->lp.act_tamper_ctl,
362 cnf->lp.act_tamper_clk_ctl,
363 cnf->lp.act_tamper_routing_ctl1,
364 cnf->lp.act_tamper_routing_ctl2);
365
Peng Fan25b7eb42023-06-15 18:08:58 +0800366 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_filt_cfg),
367 &cnf->lp.tamper_filt_cfg,
368 &cnf->lp.tamper_filt1_cfg,
369 &cnf->lp.tamper_filt2_cfg,
370 NULL, NULL, 3);
371 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200372 goto exit;
373
374 /* Configure AT */
Peng Fan25b7eb42023-06-15 18:08:58 +0800375 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.act_tamper1_cfg),
376 &cnf->lp.act_tamper1_cfg,
377 &cnf->lp.act_tamper2_cfg,
378 &cnf->lp.act_tamper2_cfg,
379 &cnf->lp.act_tamper2_cfg,
380 &cnf->lp.act_tamper2_cfg, 5);
381 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200382 goto exit;
383
384 /* Configure AT routing */
Peng Fan25b7eb42023-06-15 18:08:58 +0800385 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.act_tamper_routing_ctl1),
386 &cnf->lp.act_tamper_routing_ctl1,
387 &cnf->lp.act_tamper_routing_ctl2,
388 NULL, NULL, NULL, 2);
389 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200390 goto exit;
391
392 /* Configure AT frequency */
Peng Fan25b7eb42023-06-15 18:08:58 +0800393 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.act_tamper_clk_ctl),
394 &cnf->lp.act_tamper_clk_ctl);
395 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200396 goto exit;
397
398 /* Activate the ATs */
Peng Fan25b7eb42023-06-15 18:08:58 +0800399 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.act_tamper_ctl), &cnf->lp.act_tamper_ctl);
400 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200401 goto exit;
402
403 /* Activate the detectors */
Peng Fan25b7eb42023-06-15 18:08:58 +0800404 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_det_cfg),
405 &cnf->lp.tamper_det_cfg,
406 &cnf->lp.tamper_det_cfg2, NULL, NULL, NULL, 2);
407 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200408 goto exit;
409
410 /* Configure LP secvio */
Peng Fan25b7eb42023-06-15 18:08:58 +0800411 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.secvio_ctl), &cnf->lp.secvio_ctl);
412 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200413 goto exit;
414
415 /* Configure HP secvio */
Peng Fan25b7eb42023-06-15 18:08:58 +0800416 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.secvio_ctl), &cnf->hp.secvio_ctl);
417 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200418 goto exit;
419
420 /* Lock access */
Peng Fan25b7eb42023-06-15 18:08:58 +0800421 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.lock), &cnf->hp.lock);
422 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200423 goto exit;
424
Peng Fan25b7eb42023-06-15 18:08:58 +0800425 err = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.lock), &cnf->lp.lock);
426 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200427 goto exit;
428
429exit:
Peng Fan25b7eb42023-06-15 18:08:58 +0800430 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200431}
432
433static int dgo_write(u32 _id, u8 _access, u32 *_pdata)
434{
Peng Fan25b7eb42023-06-15 18:08:58 +0800435 int err = sc_seco_secvio_dgo_config(-1, _id, _access, _pdata);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200436
Peng Fan25b7eb42023-06-15 18:08:58 +0800437 if (err) {
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200438 printf("Failed to set dgo configuration\n");
439 debug("Failed to set conf id 0x%x : 0x%.8x", _id, *_pdata);
440 }
441
Peng Fan25b7eb42023-06-15 18:08:58 +0800442 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200443}
444
445static int apply_snvs_dgo_config(struct snvs_dgo_conf *cnf)
446{
Peng Fan25b7eb42023-06-15 18:08:58 +0800447 int err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200448
449 debug("%s\n", __func__);
450
451 debug("Applying config:\n"
452 "\ttamper_offset_ctl = 0x%.8x\n"
453 "\ttamper_pull_ctl = 0x%.8x\n"
454 "\ttamper_ana_test_ctl = 0x%.8x\n"
455 "\ttamper_sensor_trim_ctl = 0x%.8x\n"
456 "\ttamper_misc_ctl = 0x%.8x\n"
457 "\ttamper_core_volt_mon_ctl = 0x%.8x\n",
458 cnf->tamper_offset_ctl,
459 cnf->tamper_pull_ctl,
460 cnf->tamper_ana_test_ctl,
461 cnf->tamper_sensor_trim_ctl,
462 cnf->tamper_misc_ctl,
463 cnf->tamper_core_volt_mon_ctl);
464
Peng Fan25b7eb42023-06-15 18:08:58 +0800465 err = dgo_write(0x04, 1, &cnf->tamper_offset_ctl);
466 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200467 goto exit;
468
Peng Fan25b7eb42023-06-15 18:08:58 +0800469 err = dgo_write(0x14, 1, &cnf->tamper_pull_ctl);
470 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200471 goto exit;
472
Peng Fan25b7eb42023-06-15 18:08:58 +0800473 err = dgo_write(0x24, 1, &cnf->tamper_ana_test_ctl);
474 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200475 goto exit;
476
Peng Fan25b7eb42023-06-15 18:08:58 +0800477 err = dgo_write(0x34, 1, &cnf->tamper_sensor_trim_ctl);
478 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200479 goto exit;
480
Peng Fan25b7eb42023-06-15 18:08:58 +0800481 err = dgo_write(0x54, 1, &cnf->tamper_core_volt_mon_ctl);
482 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200483 goto exit;
484
485 /* Last as it could lock the writes */
Peng Fan25b7eb42023-06-15 18:08:58 +0800486 err = dgo_write(0x44, 1, &cnf->tamper_misc_ctl);
487 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200488 goto exit;
489
490exit:
Peng Fan25b7eb42023-06-15 18:08:58 +0800491 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200492}
493
494static int pad_write(u32 _pad, u32 _value)
495{
Peng Fan25b7eb42023-06-15 18:08:58 +0800496 int err = sc_pad_set(-1, _pad, _value);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200497
Peng Fan25b7eb42023-06-15 18:08:58 +0800498 if (err) {
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200499 printf("Failed to set pad configuration\n");
500 debug("Failed to set conf pad 0x%x : 0x%.8x", _pad, _value);
501 }
502
Peng Fan25b7eb42023-06-15 18:08:58 +0800503 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200504}
505
506static int apply_tamper_pin_list_config(struct tamper_pin_cfg *confs, u32 size)
507{
Peng Fan25b7eb42023-06-15 18:08:58 +0800508 int err = 0;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200509 u32 idx;
510
511 debug("%s\n", __func__);
512
513 for (idx = 0; idx < size; idx++) {
514 debug("\t idx %d: pad %d: 0x%.8x\n", idx, confs[idx].pad,
515 confs[idx].mux_conf);
Peng Fan25b7eb42023-06-15 18:08:58 +0800516 err = pad_write(confs[idx].pad, 3 << 30 | confs[idx].mux_conf);
517 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200518 goto exit;
519 }
520
521exit:
Peng Fan25b7eb42023-06-15 18:08:58 +0800522 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200523}
524
525int examples(void)
526{
527 u32 size;
528 struct snvs_security_sc_conf *snvs_conf;
529 struct snvs_dgo_conf *snvs_dgo_conf;
530 struct tamper_pin_cfg *tamper_pin_conf;
531
532 /* Caller */
533 snvs_conf = get_snvs_config();
534 snvs_dgo_conf = get_snvs_dgo_config();
535 tamper_pin_conf = get_tamper_pin_cfg_list(&size);
536
537 /* Default */
538 snvs_conf = &snvs_default_config;
539 snvs_dgo_conf = &snvs_dgo_default_config;
540 tamper_pin_conf = tamper_pin_list_default_config;
541
542 /* Passive tamper expecting VCC on the line */
543 snvs_conf = &snvs_passive_vcc_config;
544 snvs_dgo_conf = &snvs_dgo_passive_vcc_config;
545 tamper_pin_conf = tamper_pin_list_passive_vcc_config;
546
547 /* Passive tamper expecting GND on the line */
548 snvs_conf = &snvs_passive_gnd_config;
549 snvs_dgo_conf = &snvs_dgo_passive_gnd_config;
550 tamper_pin_conf = tamper_pin_list_passive_gnd_config;
551
552 /* Active tamper */
553 snvs_conf = &snvs_active_config;
554 snvs_dgo_conf = &snvs_dgo_active_config;
555 tamper_pin_conf = tamper_pin_list_active_config;
556
557 return !snvs_conf + !snvs_dgo_conf + !tamper_pin_conf;
558}
559
560#ifdef CONFIG_IMX_SNVS_SEC_SC_AUTO
561int snvs_security_sc_init(void)
562{
563 int err = 0;
564
565 struct snvs_security_sc_conf *snvs_conf;
566 struct snvs_dgo_conf *snvs_dgo_conf;
567 struct tamper_pin_cfg *tamper_pin_conf;
568 u32 size;
569
570 debug("%s\n", __func__);
571
572 snvs_conf = get_snvs_config();
573 snvs_dgo_conf = get_snvs_dgo_config();
574
575 tamper_pin_conf = get_tamper_pin_cfg_list(&size);
576
577 err = apply_tamper_pin_list_config(tamper_pin_conf, size);
578 if (err) {
579 debug("Failed to set pins\n");
580 goto exit;
581 }
582
583 err = apply_snvs_dgo_config(snvs_dgo_conf);
584 if (err) {
585 debug("Failed to set dgo\n");
586 goto exit;
587 }
588
589 err = apply_snvs_config(snvs_conf);
590 if (err) {
591 debug("Failed to set snvs\n");
592 goto exit;
593 }
594
595exit:
596 return err;
597}
598#endif /* CONFIG_IMX_SNVS_SEC_SC_AUTO */
599
600static char snvs_cfg_help_text[] =
601 "snvs_cfg\n"
602 "\thp.lock\n"
603 "\thp.secvio_ctl\n"
604 "\tlp.lock\n"
605 "\tlp.secvio_ctl\n"
606 "\tlp.tamper_filt_cfg\n"
607 "\tlp.tamper_det_cfg\n"
608 "\tlp.tamper_det_cfg2\n"
609 "\tlp.tamper_filt1_cfg\n"
610 "\tlp.tamper_filt2_cfg\n"
611 "\tlp.act_tamper1_cfg\n"
612 "\tlp.act_tamper2_cfg\n"
613 "\tlp.act_tamper3_cfg\n"
614 "\tlp.act_tamper4_cfg\n"
615 "\tlp.act_tamper5_cfg\n"
616 "\tlp.act_tamper_ctl\n"
617 "\tlp.act_tamper_clk_ctl\n"
618 "\tlp.act_tamper_routing_ctl1\n"
619 "\tlp.act_tamper_routing_ctl2\n"
620 "\n"
621 "ALL values should be in hexadecimal format";
622
623#define NB_REGISTERS 18
Simon Glassed38aef2020-05-10 11:40:03 -0600624static int do_snvs_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
625 char *const argv[])
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200626{
627 int err = 0;
628 u32 idx = 0;
629
630 struct snvs_security_sc_conf conf = {0};
631
632 if (argc != (NB_REGISTERS + 1))
633 return CMD_RET_USAGE;
634
Simon Glass3ff49ec2021-07-24 09:03:29 -0600635 conf.hp.lock = hextoul(argv[++idx], NULL);
636 conf.hp.secvio_ctl = hextoul(argv[++idx], NULL);
637 conf.lp.lock = hextoul(argv[++idx], NULL);
638 conf.lp.secvio_ctl = hextoul(argv[++idx], NULL);
639 conf.lp.tamper_filt_cfg = hextoul(argv[++idx], NULL);
640 conf.lp.tamper_det_cfg = hextoul(argv[++idx], NULL);
641 conf.lp.tamper_det_cfg2 = hextoul(argv[++idx], NULL);
642 conf.lp.tamper_filt1_cfg = hextoul(argv[++idx], NULL);
643 conf.lp.tamper_filt2_cfg = hextoul(argv[++idx], NULL);
644 conf.lp.act_tamper1_cfg = hextoul(argv[++idx], NULL);
645 conf.lp.act_tamper2_cfg = hextoul(argv[++idx], NULL);
646 conf.lp.act_tamper3_cfg = hextoul(argv[++idx], NULL);
647 conf.lp.act_tamper4_cfg = hextoul(argv[++idx], NULL);
648 conf.lp.act_tamper5_cfg = hextoul(argv[++idx], NULL);
649 conf.lp.act_tamper_ctl = hextoul(argv[++idx], NULL);
650 conf.lp.act_tamper_clk_ctl = hextoul(argv[++idx], NULL);
651 conf.lp.act_tamper_routing_ctl1 = hextoul(argv[++idx], NULL);
652 conf.lp.act_tamper_routing_ctl2 = hextoul(argv[++idx], NULL);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200653
654 err = apply_snvs_config(&conf);
655
656 return err;
657}
658
659U_BOOT_CMD(snvs_cfg,
660 NB_REGISTERS + 1, 1, do_snvs_cfg,
661 "Security violation configuration",
662 snvs_cfg_help_text
663);
664
665static char snvs_dgo_cfg_help_text[] =
666 "snvs_dgo_cfg\n"
667 "\ttamper_offset_ctl\n"
668 "\ttamper_pull_ctl\n"
669 "\ttamper_ana_test_ctl\n"
670 "\ttamper_sensor_trim_ctl\n"
671 "\ttamper_misc_ctl\n"
672 "\ttamper_core_volt_mon_ctl\n"
673 "\n"
674 "ALL values should be in hexadecimal format";
675
Simon Glassed38aef2020-05-10 11:40:03 -0600676static int do_snvs_dgo_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200677 char *const argv[])
678{
679 int err = 0;
680 u32 idx = 0;
681
682 struct snvs_dgo_conf conf = {0};
683
684 if (argc != (6 + 1))
685 return CMD_RET_USAGE;
686
Simon Glass3ff49ec2021-07-24 09:03:29 -0600687 conf.tamper_offset_ctl = hextoul(argv[++idx], NULL);
688 conf.tamper_pull_ctl = hextoul(argv[++idx], NULL);
689 conf.tamper_ana_test_ctl = hextoul(argv[++idx], NULL);
690 conf.tamper_sensor_trim_ctl = hextoul(argv[++idx], NULL);
691 conf.tamper_misc_ctl = hextoul(argv[++idx], NULL);
692 conf.tamper_core_volt_mon_ctl = hextoul(argv[++idx], NULL);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200693
694 err = apply_snvs_dgo_config(&conf);
695
696 return err;
697}
698
699U_BOOT_CMD(snvs_dgo_cfg,
700 7, 1, do_snvs_dgo_cfg,
701 "SNVS DGO configuration",
702 snvs_dgo_cfg_help_text
703);
704
705static char tamper_pin_cfg_help_text[] =
706 "snvs_dgo_cfg\n"
707 "\tpad\n"
708 "\tvalue\n"
709 "\n"
710 "ALL values should be in hexadecimal format";
711
Simon Glassed38aef2020-05-10 11:40:03 -0600712static int do_tamper_pin_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200713 char *const argv[])
714{
715 int err = 0;
716 u32 idx = 0;
717
718 struct tamper_pin_cfg conf = {0};
719
720 if (argc != (2 + 1))
721 return CMD_RET_USAGE;
722
Simon Glassff9b9032021-07-24 09:03:30 -0600723 conf.pad = dectoul(argv[++idx], NULL);
Simon Glass3ff49ec2021-07-24 09:03:29 -0600724 conf.mux_conf = hextoul(argv[++idx], NULL);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200725
726 err = apply_tamper_pin_list_config(&conf, 1);
727
728 return err;
729}
730
731U_BOOT_CMD(tamper_pin_cfg,
732 3, 1, do_tamper_pin_cfg,
733 "tamper pin configuration",
734 tamper_pin_cfg_help_text
735);
736
737static char snvs_clear_status_help_text[] =
738 "snvs_clear_status\n"
739 "\tHPSR\n"
740 "\tHPSVSR\n"
741 "\tLPSR\n"
742 "\tLPTDSR\n"
743 "\n"
744 "Write the status registers with the value provided,"
745 " clearing the status";
746
Simon Glassed38aef2020-05-10 11:40:03 -0600747static int do_snvs_clear_status(struct cmd_tbl *cmdtp, int flag, int argc,
748 char *const argv[])
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200749{
Peng Fan25b7eb42023-06-15 18:08:58 +0800750 int err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200751 u32 idx = 0;
752
753 struct snvs_security_sc_conf conf = {0};
754
755 if (argc != (2 + 1))
756 return CMD_RET_USAGE;
757
Simon Glass3ff49ec2021-07-24 09:03:29 -0600758 conf.lp.status = hextoul(argv[++idx], NULL);
759 conf.lp.tamper_det_status = hextoul(argv[++idx], NULL);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200760
Peng Fan25b7eb42023-06-15 18:08:58 +0800761 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.status),
762 &conf.lp.status, NULL, NULL, NULL, NULL, 1);
763 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200764 goto exit;
765
Peng Fan25b7eb42023-06-15 18:08:58 +0800766 err = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_det_status),
767 &conf.lp.tamper_det_status, NULL, NULL, NULL, NULL, 1);
768 if (err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200769 goto exit;
770
771exit:
Peng Fan25b7eb42023-06-15 18:08:58 +0800772 return err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200773}
774
775U_BOOT_CMD(snvs_clear_status,
776 3, 1, do_snvs_clear_status,
777 "snvs clear status",
778 snvs_clear_status_help_text
779);
780
781static char snvs_sec_status_help_text[] =
782 "snvs_sec_status\n"
783 "Display information about the security related to tamper and secvio";
784
Simon Glassed38aef2020-05-10 11:40:03 -0600785static int do_snvs_sec_status(struct cmd_tbl *cmdtp, int flag, int argc,
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200786 char *const argv[])
787{
Peng Fan25b7eb42023-06-15 18:08:58 +0800788 int err;
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200789 u32 idx;
790
791 u32 data[5];
792
793 u32 pads[] = {
794 SC_P_CSI_D00,
795 SC_P_CSI_D01,
796 SC_P_CSI_D02,
797 SC_P_CSI_D03,
798 SC_P_CSI_D04,
799 SC_P_CSI_D05,
800 SC_P_CSI_D06,
801 SC_P_CSI_D07,
802 SC_P_CSI_HSYNC,
803 SC_P_CSI_VSYNC,
804 };
805
806 u32 fuses[] = {
807 14,
808 30,
809 31,
810 260,
811 261,
812 262,
813 263,
814 768,
815 };
816
817 struct snvs_reg {
818 u32 id;
819 u32 nb;
820 } snvs[] = {
821 /* Locks */
822 {0x0, 1},
823 {0x34, 1},
824 /* Security violation */
825 {0xc, 1},
826 {0x10, 1},
827 {0x18, 1},
828 {0x40, 1},
829 /* Temper detectors */
830 {0x48, 2},
831 {0x4c, 1},
832 {0xa4, 1},
833 /* */
834 {0x44, 3},
835 {0xe0, 1},
836 {0xe4, 1},
837 {0xe8, 2},
838 /* Misc */
839 {0x3c, 1},
840 {0x5c, 2},
841 {0x64, 1},
842 {0xf8, 2},
843 };
844
845 u32 dgo[] = {
846 0x0,
847 0x10,
848 0x20,
849 0x30,
850 0x40,
851 0x50,
852 };
853
854 /* Pins */
855 printf("Pins:\n");
856 for (idx = 0; idx < ARRAY_SIZE(pads); idx++) {
857 u8 pad_id = pads[idx];
858
Peng Fan25b7eb42023-06-15 18:08:58 +0800859 err = sc_pad_get(-1, pad_id, &data[0]);
860 if (!err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200861 printf("\t- Pin %d: %.8x\n", pad_id, data[0]);
862 else
863 printf("Failed to read Pin %d\n", pad_id);
864 }
865
866 /* Fuses */
867 printf("Fuses:\n");
868 for (idx = 0; idx < ARRAY_SIZE(fuses); idx++) {
869 u32 fuse_id = fuses[idx];
870
Peng Fan25b7eb42023-06-15 18:08:58 +0800871 err = sc_misc_otp_fuse_read(-1, fuse_id, &data[0]);
872 if (!err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200873 printf("\t- Fuse %d: %.8x\n", fuse_id, data[0]);
874 else
875 printf("Failed to read Fuse %d\n", fuse_id);
876 }
877
878 /* SNVS */
879 printf("SNVS:\n");
880 for (idx = 0; idx < ARRAY_SIZE(snvs); idx++) {
881 struct snvs_reg *reg = &snvs[idx];
882
Peng Fan25b7eb42023-06-15 18:08:58 +0800883 err = sc_seco_secvio_config(-1, reg->id, 0, &data[0],
884 &data[1], &data[2], &data[3],
885 &data[4], reg->nb);
886 if (!err) {
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200887 int subidx;
888
889 printf("\t- SNVS %.2x(%d):", reg->id, reg->nb);
890 for (subidx = 0; subidx < reg->nb; subidx++)
891 printf(" %.8x", data[subidx]);
892 printf("\n");
893 } else {
894 printf("Failed to read SNVS %d\n", reg->id);
895 }
896 }
897
898 /* DGO */
899 printf("DGO:\n");
900 for (idx = 0; idx < ARRAY_SIZE(dgo); idx++) {
901 u8 dgo_id = dgo[idx];
902
Peng Fan25b7eb42023-06-15 18:08:58 +0800903 err = sc_seco_secvio_dgo_config(-1, dgo_id, 0, &data[0]);
904 if (!err)
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200905 printf("\t- DGO %.2x: %.8x\n", dgo_id, data[0]);
906 else
907 printf("Failed to read DGO %d\n", dgo_id);
908 }
909
910 return 0;
911}
912
913U_BOOT_CMD(snvs_sec_status,
914 1, 1, do_snvs_sec_status,
915 "tamper pin configuration",
916 snvs_sec_status_help_text
917);