blob: d52b4b8396b47740cc1790d7b9f5023f045b55d1 [file] [log] [blame]
Michal Simek4e2f4df2018-09-13 08:44:02 +02001CONFIG_ARM=y
Trevor Woerner43ec7e02019-05-03 09:41:00 -04002CONFIG_SPL_SYS_DCACHE_OFF=y
Michal Simek4e2f4df2018-09-13 08:44:02 +02003CONFIG_ARCH_ZYNQ=y
4CONFIG_SYS_TEXT_BASE=0x4000000
Tom Rinif6e6e1a2020-01-22 13:38:00 -05005CONFIG_DM_GPIO=y
Tom Rinic9285bf2019-04-29 15:54:04 -04006CONFIG_SPL_STACK_R_ADDR=0x200000
Michal Simek4e2f4df2018-09-13 08:44:02 +02007CONFIG_SPL=y
8CONFIG_DEBUG_UART_BASE=0xe0001000
9CONFIG_DEBUG_UART_CLOCK=50000000
10CONFIG_IDENT_STRING=" Xilinx Zynq DLC20 Rev1.0"
Michal Simek4e2f4df2018-09-13 08:44:02 +020011CONFIG_DEBUG_UART=y
12CONFIG_DISTRO_DEFAULTS=y
Tom Rinie478f702019-06-02 08:57:32 -040013CONFIG_SYS_CUSTOM_LDSCRIPT=y
14CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
Michal Simek4e2f4df2018-09-13 08:44:02 +020015CONFIG_FIT=y
16CONFIG_FIT_SIGNATURE=y
17CONFIG_FIT_VERBOSE=y
Tom Rinic220bd92019-05-23 07:14:07 -040018CONFIG_LEGACY_IMAGE_FORMAT=y
Simon Glass4be229d2019-07-20 20:51:14 -060019CONFIG_USE_PREBOOT=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020020CONFIG_SPL_STACK_R=y
21CONFIG_SPL_OS_BOOT=y
22CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer38df9972019-08-22 15:41:46 +020023CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
Michal Simek04a80b72019-10-14 09:38:39 +020024# CONFIG_BOOTM_NETBSD is not set
Michal Simek4e2f4df2018-09-13 08:44:02 +020025CONFIG_CMD_THOR_DOWNLOAD=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020026CONFIG_CMD_DFU=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020027CONFIG_CMD_FPGA_LOADBP=y
28CONFIG_CMD_FPGA_LOADFS=y
29CONFIG_CMD_FPGA_LOADMK=y
30CONFIG_CMD_FPGA_LOADP=y
31CONFIG_CMD_GPIO=y
32CONFIG_CMD_I2C=y
33CONFIG_CMD_MMC=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020034CONFIG_CMD_USB=y
35# CONFIG_CMD_SETEXPR is not set
36CONFIG_CMD_TFTPPUT=y
37CONFIG_CMD_CACHE=y
38CONFIG_CMD_EXT4_WRITE=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020039CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0"
40CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -050041CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020042CONFIG_NET_RANDOM_ETHADDR=y
43CONFIG_SPL_DM_SEQ_ALIAS=y
44CONFIG_DFU_MMC=y
45CONFIG_DFU_RAM=y
46CONFIG_FPGA_XILINX=y
47CONFIG_FPGA_ZYNQPL=y
Michal Simek2a6fafb2019-01-22 14:43:04 +010048CONFIG_DM_I2C=y
49CONFIG_SYS_I2C_CADENCE=y
50CONFIG_MISC=y
51CONFIG_I2C_EEPROM=y
52CONFIG_SYS_I2C_EEPROM_ADDR=0x0
53CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
Michal Simek4e2f4df2018-09-13 08:44:02 +020054CONFIG_MMC_SDHCI=y
55CONFIG_MMC_SDHCI_ZYNQ=y
Patrick Delaunay0df81042019-02-27 15:20:36 +010056CONFIG_SF_DEFAULT_SPEED=30000000
Michal Simek4e2f4df2018-09-13 08:44:02 +020057CONFIG_SPI_FLASH_STMICRO=y
58CONFIG_SPI_FLASH_WINBOND=y
59CONFIG_PHY_REALTEK=y
60CONFIG_MII=y
61CONFIG_ZYNQ_GEM=y
62CONFIG_DEBUG_UART_ZYNQ=y
63CONFIG_DEBUG_UART_ANNOUNCE=y
64CONFIG_ZYNQ_SERIAL=y
65CONFIG_ZYNQ_QSPI=y
66CONFIG_USB=y
67CONFIG_USB_EHCI_HCD=y
68CONFIG_USB_ULPI_VIEWPORT=y
69CONFIG_USB_ULPI=y
Michal Simek4e2f4df2018-09-13 08:44:02 +020070CONFIG_USB_GADGET=y
71CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
72CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
73CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
74CONFIG_CI_UDC=y
75CONFIG_USB_GADGET_DOWNLOAD=y
76CONFIG_USB_FUNCTION_THOR=y