Daniel Hellstrom | 9d7c6b2 | 2008-03-28 09:47:00 +0100 | [diff] [blame] | 1 | /* SPARC stack layout Macros and structures, |
| 2 | * mainly taken from BCC (the Bare C compiler for |
| 3 | * SPARC LEON2/3) sources. |
| 4 | * |
| 5 | * (C) Copyright 2007 |
| 6 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #ifndef __SPARC_STACK_H__ |
| 26 | #define __SPARC_STACK_H__ |
| 27 | |
| 28 | #include <asm/ptrace.h> |
| 29 | |
| 30 | #ifndef __ASSEMBLER__ |
| 31 | |
| 32 | #ifdef __cplusplus |
| 33 | extern "C" { |
| 34 | #endif |
| 35 | |
| 36 | #define PT_REGS_SZ sizeof(struct pt_regs) |
| 37 | |
| 38 | /* A Sparc stack frame */ |
| 39 | struct sparc_stackframe_regs { |
| 40 | unsigned long sf_locals[8]; |
| 41 | unsigned long sf_ins[6]; |
| 42 | struct sparc_stackframe_regs *sf_fp; |
| 43 | unsigned long sf_callers_pc; |
| 44 | char *sf_structptr; |
| 45 | unsigned long sf_xargs[6]; |
| 46 | unsigned long sf_xxargs[1]; |
| 47 | }; |
| 48 | #define SF_REGS_SZ sizeof(struct sparc_stackframe_regs) |
| 49 | |
| 50 | /* A register window */ |
| 51 | struct sparc_regwindow_regs { |
| 52 | unsigned long locals[8]; |
| 53 | unsigned long ins[8]; |
| 54 | }; |
| 55 | #define RW_REGS_SZ sizeof(struct sparc_regwindow_regs) |
| 56 | |
| 57 | /* A fpu window */ |
| 58 | struct sparc_fpuwindow_regs { |
| 59 | unsigned long locals[32]; |
| 60 | unsigned long fsr; |
| 61 | unsigned long lastctx; |
| 62 | }; |
| 63 | #define FW_REGS_SZ sizeof(struct sparc_fpuwindow_regs) |
| 64 | |
| 65 | #ifdef __cplusplus |
| 66 | } |
| 67 | #endif |
| 68 | #else |
| 69 | #define PT_REGS_SZ 0x50 /* 20*4 */ |
| 70 | #define SF_REGS_SZ 0x60 /* 24*4 */ |
| 71 | #define RW_REGS_SZ 0x20 /* 16*4 */ |
| 72 | #define FW_REGS_SZ 0x88 /* 34*4 */ |
| 73 | #endif /* !ASM */ |
| 74 | |
| 75 | /* These are for pt_regs. */ |
| 76 | #define PT_PSR 0x0 |
| 77 | #define PT_PC 0x4 |
| 78 | #define PT_NPC 0x8 |
| 79 | #define PT_Y 0xc |
| 80 | #define PT_G0 0x10 |
| 81 | #define PT_WIM PT_G0 |
| 82 | #define PT_G1 0x14 |
| 83 | #define PT_G2 0x18 |
| 84 | #define PT_G3 0x1c |
| 85 | #define PT_G4 0x20 |
| 86 | #define PT_G5 0x24 |
| 87 | #define PT_G6 0x28 |
| 88 | #define PT_G7 0x2c |
| 89 | #define PT_I0 0x30 |
| 90 | #define PT_I1 0x34 |
| 91 | #define PT_I2 0x38 |
| 92 | #define PT_I3 0x3c |
| 93 | #define PT_I4 0x40 |
| 94 | #define PT_I5 0x44 |
| 95 | #define PT_I6 0x48 |
| 96 | #define PT_FP PT_I6 |
| 97 | #define PT_I7 0x4c |
| 98 | |
| 99 | /* Stack_frame offsets */ |
| 100 | #define SF_L0 0x00 |
| 101 | #define SF_L1 0x04 |
| 102 | #define SF_L2 0x08 |
| 103 | #define SF_L3 0x0c |
| 104 | #define SF_L4 0x10 |
| 105 | #define SF_L5 0x14 |
| 106 | #define SF_L6 0x18 |
| 107 | #define SF_L7 0x1c |
| 108 | #define SF_I0 0x20 |
| 109 | #define SF_I1 0x24 |
| 110 | #define SF_I2 0x28 |
| 111 | #define SF_I3 0x2c |
| 112 | #define SF_I4 0x30 |
| 113 | #define SF_I5 0x34 |
| 114 | #define SF_FP 0x38 |
| 115 | #define SF_PC 0x3c |
| 116 | #define SF_RETP 0x40 |
| 117 | #define SF_XARG0 0x44 |
| 118 | #define SF_XARG1 0x48 |
| 119 | #define SF_XARG2 0x4c |
| 120 | #define SF_XARG3 0x50 |
| 121 | #define SF_XARG4 0x54 |
| 122 | #define SF_XARG5 0x58 |
| 123 | #define SF_XXARG 0x5c |
| 124 | |
| 125 | /* Reg_window offsets */ |
| 126 | #define RW_L0 0x00 |
| 127 | #define RW_L1 0x04 |
| 128 | #define RW_L2 0x08 |
| 129 | #define RW_L3 0x0c |
| 130 | #define RW_L4 0x10 |
| 131 | #define RW_L5 0x14 |
| 132 | #define RW_L6 0x18 |
| 133 | #define RW_L7 0x1c |
| 134 | #define RW_I0 0x20 |
| 135 | #define RW_I1 0x24 |
| 136 | #define RW_I2 0x28 |
| 137 | #define RW_I3 0x2c |
| 138 | #define RW_I4 0x30 |
| 139 | #define RW_I5 0x34 |
| 140 | #define RW_I6 0x38 |
| 141 | #define RW_I7 0x3c |
| 142 | |
| 143 | /* Fpu_window offsets */ |
| 144 | #define FW_F0 0x00 |
| 145 | #define FW_F2 0x08 |
| 146 | #define FW_F4 0x10 |
| 147 | #define FW_F6 0x18 |
| 148 | #define FW_F8 0x20 |
| 149 | #define FW_F10 0x28 |
| 150 | #define FW_F12 0x30 |
| 151 | #define FW_F14 0x38 |
| 152 | #define FW_F16 0x40 |
| 153 | #define FW_F18 0x48 |
| 154 | #define FW_F20 0x50 |
| 155 | #define FW_F22 0x58 |
| 156 | #define FW_F24 0x60 |
| 157 | #define FW_F26 0x68 |
| 158 | #define FW_F28 0x70 |
| 159 | #define FW_F30 0x78 |
| 160 | #define FW_FSR 0x80 |
| 161 | |
| 162 | #endif |