| Gaurav Jain | a8ae3f6 | 2022-03-24 11:50:36 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) |
| 2 | /* |
| 3 | * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ] |
| 4 | * |
| 5 | * Copyright 2011-2012 Freescale Semiconductor Inc. |
| 6 | */ |
| 7 | |
| 8 | crypto: crypto@300000 { |
| 9 | compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0"; |
| 10 | fsl,sec-era = <5>; |
| 11 | #address-cells = <1>; |
| 12 | #size-cells = <1>; |
| 13 | reg = <0x300000 0x10000>; |
| 14 | ranges = <0 0x300000 0x10000>; |
| 15 | interrupts = <92 2 0 0>; |
| 16 | |
| 17 | sec_jr0: jr@1000 { |
| 18 | compatible = "fsl,sec-v5.2-job-ring", |
| 19 | "fsl,sec-v5.0-job-ring", |
| 20 | "fsl,sec-v4.0-job-ring"; |
| 21 | reg = <0x1000 0x1000>; |
| 22 | interrupts = <88 2 0 0>; |
| 23 | }; |
| 24 | |
| 25 | sec_jr1: jr@2000 { |
| 26 | compatible = "fsl,sec-v5.2-job-ring", |
| 27 | "fsl,sec-v5.0-job-ring", |
| 28 | "fsl,sec-v4.0-job-ring"; |
| 29 | reg = <0x2000 0x1000>; |
| 30 | interrupts = <89 2 0 0>; |
| 31 | }; |
| 32 | |
| 33 | sec_jr2: jr@3000 { |
| 34 | compatible = "fsl,sec-v5.2-job-ring", |
| 35 | "fsl,sec-v5.0-job-ring", |
| 36 | "fsl,sec-v4.0-job-ring"; |
| 37 | reg = <0x3000 0x1000>; |
| 38 | interrupts = <90 2 0 0>; |
| 39 | }; |
| 40 | |
| 41 | sec_jr3: jr@4000 { |
| 42 | compatible = "fsl,sec-v5.2-job-ring", |
| 43 | "fsl,sec-v5.0-job-ring", |
| 44 | "fsl,sec-v4.0-job-ring"; |
| 45 | reg = <0x4000 0x1000>; |
| 46 | interrupts = <91 2 0 0>; |
| 47 | }; |
| 48 | |
| 49 | rtic@6000 { |
| 50 | compatible = "fsl,sec-v5.2-rtic", |
| 51 | "fsl,sec-v5.0-rtic", |
| 52 | "fsl,sec-v4.0-rtic"; |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
| 55 | reg = <0x6000 0x100>; |
| 56 | ranges = <0x0 0x6100 0xe00>; |
| 57 | |
| 58 | rtic_a: rtic-a@0 { |
| 59 | compatible = "fsl,sec-v5.2-rtic-memory", |
| 60 | "fsl,sec-v5.0-rtic-memory", |
| 61 | "fsl,sec-v4.0-rtic-memory"; |
| 62 | reg = <0x00 0x20 0x100 0x80>; |
| 63 | }; |
| 64 | |
| 65 | rtic_b: rtic-b@20 { |
| 66 | compatible = "fsl,sec-v5.2-rtic-memory", |
| 67 | "fsl,sec-v5.0-rtic-memory", |
| 68 | "fsl,sec-v4.0-rtic-memory"; |
| 69 | reg = <0x20 0x20 0x200 0x80>; |
| 70 | }; |
| 71 | |
| 72 | rtic_c: rtic-c@40 { |
| 73 | compatible = "fsl,sec-v5.2-rtic-memory", |
| 74 | "fsl,sec-v5.0-rtic-memory", |
| 75 | "fsl,sec-v4.0-rtic-memory"; |
| 76 | reg = <0x40 0x20 0x300 0x80>; |
| 77 | }; |
| 78 | |
| 79 | rtic_d: rtic-d@60 { |
| 80 | compatible = "fsl,sec-v5.2-rtic-memory", |
| 81 | "fsl,sec-v5.0-rtic-memory", |
| 82 | "fsl,sec-v4.0-rtic-memory"; |
| 83 | reg = <0x60 0x20 0x500 0x80>; |
| 84 | }; |
| 85 | }; |
| 86 | }; |
| 87 | |
| 88 | sec_mon: sec_mon@314000 { |
| 89 | compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon"; |
| 90 | reg = <0x314000 0x1000>; |
| 91 | interrupts = <93 2 0 0>; |
| 92 | }; |