Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * Configuration settings for the AcTux-4 board. |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | #define CONFIG_IXP425 1 |
| 14 | #define CONFIG_ACTUX4 1 |
| 15 | |
Marek Vasut | f0ed2fb | 2012-03-06 00:45:35 +0100 | [diff] [blame] | 16 | #define CONFIG_MACH_TYPE 1532 |
| 17 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 18 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 19 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 20 | |
Jean-Christophe PLAGNIOL-VILLARD | 08cae4d | 2009-01-31 09:10:48 +0100 | [diff] [blame] | 21 | #define CONFIG_IXP_SERIAL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 23 | #define CONFIG_BAUDRATE 115200 |
| 24 | #define CONFIG_BOOTDELAY 3 |
| 25 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 26 | #define CONFIG_BOARD_EARLY_INIT_F 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 27 | |
| 28 | /*************************************************************** |
| 29 | * U-boot generic defines start here. |
| 30 | ***************************************************************/ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 31 | /* Size of malloc() pool */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 32 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 33 | |
| 34 | /* allow to overwrite serial and ethaddr */ |
| 35 | #define CONFIG_ENV_OVERWRITE |
| 36 | |
| 37 | /* Command line configuration */ |
| 38 | #include <config_cmd_default.h> |
| 39 | |
| 40 | #define CONFIG_CMD_ELF |
| 41 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 42 | #define CONFIG_PCI |
| 43 | #ifdef CONFIG_PCI |
| 44 | #define CONFIG_CMD_PCI |
| 45 | #define CONFIG_PCI_PNP |
| 46 | #define CONFIG_IXP_PCI |
| 47 | #define CONFIG_PCI_SCAN_SHOW |
| 48 | #define CONFIG_CMD_PCI_ENUM |
| 49 | #endif |
| 50 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 51 | #define CONFIG_BOOTCOMMAND "run boot_flash" |
| 52 | /* enable passing of ATAGs */ |
| 53 | #define CONFIG_CMDLINE_TAG 1 |
| 54 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 55 | #define CONFIG_INITRD_TAG 1 |
| 56 | |
| 57 | #if defined(CONFIG_CMD_KGDB) |
| 58 | # define CONFIG_KGDB_BAUDRATE 230400 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 59 | #endif |
| 60 | |
| 61 | /* Miscellaneous configurable options */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 62 | #define CONFIG_SYS_LONGHELP |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 63 | /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | #define CONFIG_SYS_CBSIZE 256 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 65 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 66 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 67 | /* max number of command args */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_MAXARGS 16 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 69 | /* Boot Argument Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 71 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 72 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
| 73 | #define CONFIG_SYS_MEMTEST_END 0x00800000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 74 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 75 | /* timer clock - 2* OSC_IN system clock */ |
| 76 | #define CONFIG_IXP425_TIMER_CLK 66000000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 77 | |
| 78 | /* default load address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 79 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 80 | |
| 81 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 82 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 83 | 115200, 230400 } |
| 84 | #define CONFIG_SERIAL_RTS_ACTIVE 1 |
| 85 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 86 | /* Expansion bus settings */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_EXP_CS0 0xbd113003 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 88 | |
| 89 | /* SDRAM settings */ |
| 90 | #define CONFIG_NR_DRAM_BANKS 1 |
| 91 | #define PHYS_SDRAM_1 0x00000000 |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 92 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 93 | |
| 94 | /* 32MB SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #define CONFIG_SYS_SDR_CONFIG 0x18 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 96 | #define PHYS_SDRAM_1_SIZE 0x02000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 97 | #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
| 98 | #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 |
| 99 | #define CONFIG_SYS_DRAM_SIZE 0x02000000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 100 | |
| 101 | /* FLASH organization */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_TEXT_BASE 0x50000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 104 | /* max # of sectors per chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_MAX_FLASH_SECT 70 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 106 | #define PHYS_FLASH_1 0x50000000 |
| 107 | #define PHYS_FLASH_2 0x51000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 109 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 111 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 112 | #define CONFIG_SYS_MONITOR_LEN (252 << 10) |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 113 | #define CONFIG_BOARD_SIZE_LIMIT 258048 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 114 | |
| 115 | /* Use common CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 117 | #define CONFIG_FLASH_CFI_DRIVER |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 118 | /* board provides its own flash_init code */ |
| 119 | #define CONFIG_FLASH_CFI_LEGACY 1 |
| 120 | /* no byte writes on IXP4xx */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 121 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 122 | /* SST 39VF020 etc. support */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 124 | |
| 125 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 126 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 127 | |
| 128 | /* Ethernet */ |
| 129 | |
| 130 | /* include IXP4xx NPE support */ |
| 131 | #define CONFIG_IXP4XX_NPE 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 132 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 133 | /* NPE0 PHY address */ |
| 134 | #define CONFIG_PHY_ADDR 0x1C |
| 135 | /* MII PHY management */ |
| 136 | #define CONFIG_MII 1 |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 137 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 138 | /* Number of ethernet rx buffers & descriptors */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 140 | |
| 141 | #define CONFIG_CMD_DHCP |
| 142 | #define CONFIG_CMD_NET |
| 143 | #define CONFIG_CMD_MII |
| 144 | #define CONFIG_CMD_PING |
| 145 | #undef CONFIG_CMD_NFS |
| 146 | |
| 147 | /* BOOTP options */ |
| 148 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 149 | #define CONFIG_BOOTP_BOOTPATH |
| 150 | #define CONFIG_BOOTP_GATEWAY |
| 151 | #define CONFIG_BOOTP_HOSTNAME |
| 152 | |
| 153 | /* Cache Configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 154 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 155 | |
| 156 | /* environment organization: one complete 4k flash sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 157 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 158 | #define CONFIG_ENV_SIZE 0x1000 |
| 159 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 160 | |
| 161 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Jean-Christophe PLAGNIOL-VILLARD | 1948d6c | 2009-01-31 09:53:39 +0100 | [diff] [blame] | 162 | "npe_ucode=51000000\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 163 | "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ |
| 164 | "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ |
| 165 | "kerneladdr=51020000\0" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 166 | "kernelfile=actux4/uImage\0" \ |
| 167 | "rootfile=actux4/rootfs\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 168 | "rootaddr=51160000\0" \ |
| 169 | "loadaddr=10000\0" \ |
| 170 | "updateboot_ser=mw.b 10000 ff 40000;" \ |
| 171 | " loady ${loadaddr};" \ |
| 172 | " run eraseboot writeboot\0" \ |
| 173 | "updateboot_net=mw.b 10000 ff 40000;" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 174 | " tftp ${loadaddr} actux4/u-boot.bin;" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 175 | " run eraseboot writeboot\0" \ |
| 176 | "eraseboot=protect off 50000000 5003efff;" \ |
| 177 | " erase 50000000 +${filesize}\0" \ |
| 178 | "writeboot=cp.b 10000 50000000 ${filesize}\0" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 179 | "updateucode=loady;" \ |
| 180 | " era ${npe_ucode} +${filesize};" \ |
| 181 | " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 182 | "updateroot=tftp ${loadaddr} ${rootfile};" \ |
| 183 | " era ${rootaddr} +${filesize};" \ |
| 184 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ |
| 185 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ |
| 186 | " era ${kerneladdr} +${filesize};" \ |
| 187 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ |
| 188 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ |
| 189 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 190 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ |
| 191 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 192 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
| 193 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ |
| 194 | "boot_flash=run flashargs addtty addeth;" \ |
| 195 | " bootm ${kerneladdr}\0" \ |
| 196 | "boot_net=run netargs addtty addeth;" \ |
| 197 | " tftpboot ${loadaddr} ${kernelfile};" \ |
| 198 | " bootm\0" |
| 199 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 200 | /* additions for new relocation code, must be added to all boards */ |
| 201 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 202 | (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) |
| 203 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 204 | #endif /* __CONFIG_H */ |