Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / ba79feda29f0b53ab27d5159b234b497699467da / . / configs / evb-ast2500_defconfig
blob: b572f946c5feb98d367e3a04ba5bffa191faf9a3 [file] [log] [blame]
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]1CONFIG_ARM=y
Trevor Woernerba64b8b2019-05-03 09:40:59 -0400[diff] [blame]2CONFIG_SYS_DCACHE_OFF=y
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]3CONFIG_ARCH_ASPEED=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x0
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]5CONFIG_ASPEED_AST2500=y
6CONFIG_TARGET_EVB_AST2500=y
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x20000
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=1
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]10CONFIG_PRE_CON_BUF_ADDR=0x1e720000
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]11CONFIG_USE_BOOTARGS=y
12CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]13CONFIG_PRE_CONSOLE_BUFFER=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]14# CONFIG_DISPLAY_CPUINFO is not set
Joel Stanley549ef5e2019-07-04 11:05:15 +0930[diff] [blame]15CONFIG_HUSH_PARSER=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]16# CONFIG_AUTO_COMPLETE is not set
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]17CONFIG_CMD_I2C=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]18CONFIG_CMD_MMC=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]19CONFIG_CMD_DHCP=y
20CONFIG_CMD_MII=y
21CONFIG_CMD_PING=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]22CONFIG_OF_EMBED=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]23CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]24CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Joel Stanley549ef5e2019-07-04 11:05:15 +0930[diff] [blame]25CONFIG_NET_RANDOM_ETHADDR=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]26CONFIG_REGMAP=y
27CONFIG_CLK=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]28CONFIG_DM_I2C=y
29CONFIG_SYS_I2C_ASPEED=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]30CONFIG_DM_MMC=y
31CONFIG_MMC_SDHCI=y
32CONFIG_MMC_SDHCI_ASPEED=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]33CONFIG_PHY_REALTEK=y
34CONFIG_DM_ETH=y
35CONFIG_FTGMAC100=y
36CONFIG_PHY=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]37CONFIG_PINCTRL=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]38CONFIG_RAM=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]39CONFIG_DM_RESET=y
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]40CONFIG_DM_SERIAL=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]41CONFIG_SYS_NS16550=y
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]42CONFIG_SYSRESET=y
maxims@google.com7cb5a002017-01-18 13:44:58 -0800[diff] [blame]43CONFIG_TIMER=y
maxims@google.com0fdb11a2017-04-17 12:00:26 -0700[diff] [blame]44CONFIG_WDT=y