blob: 12013aa5a4da42a07d1707593f4594a563fc6bce [file] [log] [blame]
Adam Ford14879032020-05-03 08:11:33 -05001// SPDX-License-Identifier: GPL-2.0+
2
Adam Ford14879032020-05-03 08:11:33 -05003#include <cpu_func.h>
4#include <hang.h>
Simon Glass97589732020-05-10 11:40:02 -06005#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06006#include <log.h>
Adam Ford14879032020-05-03 08:11:33 -05007#include <spl.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06008#include <asm/global_data.h>
Adam Ford14879032020-05-03 08:11:33 -05009#include <asm/io.h>
10#include <asm/mach-imx/iomux-v3.h>
11#include <asm/arch/clock.h>
12#include <asm/arch/imx8mm_pins.h>
13#include <asm/arch/sys_proto.h>
14#include <asm/mach-imx/boot_mode.h>
15#include <asm/arch/ddr.h>
Shiji Yangbb112342023-08-03 09:47:16 +080016#include <asm/sections.h>
Adam Ford14879032020-05-03 08:11:33 -050017
18#include <dm/uclass.h>
19#include <dm/device.h>
20#include <dm/uclass-internal.h>
21#include <dm/device-internal.h>
22
23#include <power/pmic.h>
24#include <power/bd71837.h>
25
26DECLARE_GLOBAL_DATA_PTR;
27
28int spl_board_boot_device(enum boot_device boot_dev_spl)
29{
30 switch (boot_dev_spl) {
31 case SD2_BOOT:
32 case MMC2_BOOT:
33 return BOOT_DEVICE_MMC1;
34 case SD3_BOOT:
35 case MMC3_BOOT:
36 return BOOT_DEVICE_MMC2;
Adam Ford2cc246a2022-10-22 09:28:23 -050037 case USB_BOOT:
38 return BOOT_DEVICE_BOARD;
Adam Ford25f43c62023-02-01 19:58:41 -060039 case QSPI_BOOT:
40 return BOOT_DEVICE_NOR;
Adam Ford14879032020-05-03 08:11:33 -050041 default:
42 return BOOT_DEVICE_NONE;
43 }
44}
45
46static void spl_dram_init(void)
47{
48 ddr_init(&dram_timing);
49}
50
Adam Ford25f43c62023-02-01 19:58:41 -060051void spl_board_init(void)
52{
53 arch_misc_init();
54}
55
Adam Ford14879032020-05-03 08:11:33 -050056#ifdef CONFIG_SPL_LOAD_FIT
57int board_fit_config_name_match(const char *name)
58{
59 /* Just empty function now - can't decide what to choose */
60 debug("%s: %s\n", __func__, name);
61
62 return 0;
63}
64#endif
65
Adam Ford14879032020-05-03 08:11:33 -050066static int power_init_board(void)
67{
68 struct udevice *dev;
69 int ret;
70
71 ret = pmic_get("pmic@4b", &dev);
72 if (ret == -ENODEV) {
73 puts("No pmic\n");
74 return 0;
75 }
76 if (ret != 0)
77 return ret;
78
79 /* decrease RESET key long push time from the default 10s to 10ms */
80 pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
81
82 /* unlock the PMIC regs */
83 pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
84
85 /* increase VDD_SOC to typical value 0.85v before first DRAM access */
86 pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
87
88 /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
89 pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
90
91 /* lock the PMIC regs */
92 pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
93
94 return 0;
95}
96
97void board_init_f(ulong dummy)
98{
99 struct udevice *dev;
100 int ret;
101
102 arch_cpu_init();
103
104 init_uart_clk(1);
105
Adam Ford14879032020-05-03 08:11:33 -0500106 timer_init();
107
Adam Ford14879032020-05-03 08:11:33 -0500108 /* Clear the BSS. */
109 memset(__bss_start, 0, __bss_end - __bss_start);
110
111 ret = spl_early_init();
112 if (ret) {
113 debug("spl_early_init() failed: %d\n", ret);
114 hang();
115 }
116
Peng Fana9ed59c2022-06-11 20:20:55 +0800117 preloader_console_init();
118
Adam Ford14879032020-05-03 08:11:33 -0500119 ret = uclass_get_device_by_name(UCLASS_CLK,
120 "clock-controller@30380000",
121 &dev);
122 if (ret < 0) {
123 printf("Failed to find clock node. Check device tree\n");
124 hang();
125 }
126
127 enable_tzc380();
128
129 power_init_board();
130
131 /* DDR initialization */
132 spl_dram_init();
133
134 board_init_r(NULL, 0);
135}