blob: afef7e93d03b6efe06d2b2c913fdff50a2d61211 [file] [log] [blame]
Chunhe Lan8e4f3ff2014-04-14 18:42:06 +08001/*
2 * Copyright 2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <command.h>
9#include <i2c.h>
10#include <netdev.h>
11#include <linux/compiler.h>
12#include <asm/mmu.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15#include <asm/immap_85xx.h>
16#include <asm/fsl_law.h>
17#include <asm/fsl_serdes.h>
18#include <asm/fsl_portals.h>
19#include <asm/fsl_liodn.h>
20#include <fm_eth.h>
21
22#include "t4rdb.h"
23
24DECLARE_GLOBAL_DATA_PTR;
25
26int checkboard(void)
27{
28 struct cpu_type *cpu = gd->arch.cpu;
29
30 printf("Board: %sRDB, ", cpu->name);
31
32 puts("SERDES Reference Clocks:\n");
33 printf(" SERDES1=100MHz SERDES2=156.25MHz\n"
34 " SERDES3=100MHz SERDES4=100MHz\n");
35
36 return 0;
37}
38
39int board_early_init_r(void)
40{
41 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
York Sun220c3462014-06-24 21:16:20 -070042 int flash_esel = find_tlb_idx((void *)flashbase, 1);
Chunhe Lan8e4f3ff2014-04-14 18:42:06 +080043
44 /*
45 * Remap Boot flash + PROMJET region to caching-inhibited
46 * so that flash can be erased properly.
47 */
48
49 /* Flush d-cache and invalidate i-cache of any FLASH data */
50 flush_dcache();
51 invalidate_icache();
52
York Sun220c3462014-06-24 21:16:20 -070053 if (flash_esel == -1) {
54 /* very unlikely unless something is messed up */
55 puts("Error: Could not find TLB for FLASH BASE\n");
56 flash_esel = 2; /* give our best effort to continue */
57 } else {
58 /* invalidate existing TLB entry for flash + promjet */
59 disable_tlb(flash_esel);
60 }
Chunhe Lan8e4f3ff2014-04-14 18:42:06 +080061
62 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
63 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
64 0, flash_esel, BOOKE_PAGESZ_256M, 1);
65
66 set_liodns();
67#ifdef CONFIG_SYS_DPAA_QBMAN
68 setup_portals();
69#endif
70
71 return 0;
72}
73
74int misc_init_r(void)
75{
76 return 0;
77}
78
79void ft_board_setup(void *blob, bd_t *bd)
80{
81 phys_addr_t base;
82 phys_size_t size;
83
84 ft_cpu_setup(blob, bd);
85
86 base = getenv_bootm_low();
87 size = getenv_bootm_size();
88
89 fdt_fixup_memory(blob, (u64)base, (u64)size);
90
91#ifdef CONFIG_PCI
92 pci_of_setup(blob, bd);
93#endif
94
95 fdt_fixup_liodn(blob);
96 fdt_fixup_dr_usb(blob, bd);
97
98#ifdef CONFIG_SYS_DPAA_FMAN
99 fdt_fixup_fman_ethernet(blob);
100 fdt_fixup_board_enet(blob);
101#endif
102}
103
104/*
105 * This function is called by bdinfo to print detail board information.
106 * As an exmaple for future board, we organize the messages into
107 * several sections. If applicable, the message is in the format of
108 * <name> = <value>
109 * It should aligned with normal output of bdinfo command.
110 *
111 * Voltage: Core, DDR and another configurable voltages
112 * Clock : Critical clocks which are not printed already
113 * RCW : RCW source if not printed already
114 * Misc : Other important information not in above catagories
115 */
116void board_detail(void)
117{
118 int rcwsrc;
119
120 /* RCW section SW3[4] */
121 rcwsrc = 0x0;
122 puts("RCW source = ");
123 switch (rcwsrc & 0x1) {
124 case 0x1:
125 puts("SDHC/eMMC\n");
126 break;
127 default:
128 puts("I2C normal addressing\n");
129 break;
130 }
131}