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Simon Glass456dd7c2014-10-13 23:42:00 -06001Soft SPI
2
3The soft SPI bus implementation allows the use of GPIO pins to simulate a
4SPI bus. No SPI host is required for this to work. The down-side is that the
5performance will typically be much lower than a real SPI bus.
6
7The soft SPI node requires the following properties:
8
Miquel Raynal3c6b10f2017-12-29 15:55:55 +01009Mandatory properties:
10compatible: "spi-gpio"
11cs-gpios: GPIOs to use for SPI chip select (output)
Fabio Estevamf4e7a482023-05-18 19:22:41 -030012sck-gpios: GPIO to use for SPI clock (output)
Miquel Raynal3c6b10f2017-12-29 15:55:55 +010013And at least one of:
Fabio Estevamf4e7a482023-05-18 19:22:41 -030014mosi-gpios: GPIO to use for SPI MOSI line (output)
15miso-gpios: GPIO to use for SPI MISO line (input)
Miquel Raynal3c6b10f2017-12-29 15:55:55 +010016
17Optional propertie:
Simon Glass456dd7c2014-10-13 23:42:00 -060018spi-delay-us: Number of microseconds of delay between each CS transition
19
20The GPIOs should be specified as required by the GPIO controller referenced.
21The first cell holds the phandle of the controller and the second cell
22typically holds the GPIO number.
23
24
25Example:
26
27 soft-spi {
Miquel Raynal3c6b10f2017-12-29 15:55:55 +010028 compatible = "spi-gpio";
29 cs-gpios = <&gpio 235 0>; /* Y43 */
Fabio Estevamf4e7a482023-05-18 19:22:41 -030030 sck-gpios = <&gpio 225 0>; /* Y31 */
31 mosi-gpios = <&gpio 227 0>; /* Y33 */
32 miso-gpios = <&gpio 224 0>; /* Y30 */
Simon Glass456dd7c2014-10-13 23:42:00 -060033 spi-delay-us = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
36 cs@0 {
37 };
38 };