Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) Freescale Semiconductor, Inc. 2006. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 21 | */ |
| 22 | /* |
| 23 | * mpc8313epb board configuration file |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | /* |
| 30 | * High Level Configuration Options |
| 31 | */ |
| 32 | #define CONFIG_E300 1 |
| 33 | #define CONFIG_MPC83XX 1 |
| 34 | #define CONFIG_MPC831X 1 |
| 35 | #define CONFIG_MPC8313 1 |
| 36 | #define CONFIG_MPC8313ERDB 1 |
| 37 | |
| 38 | #define CONFIG_PCI |
| 39 | #define CONFIG_83XX_GENERIC_PCI |
| 40 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 41 | #define CONFIG_MISC_INIT_R |
| 42 | |
| 43 | /* |
| 44 | * On-board devices |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 45 | * |
| 46 | * TSEC1 is VSC switch |
| 47 | * TSEC2 is SoC TSEC |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 48 | */ |
| 49 | #define CONFIG_VSC7385_ENET |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 50 | #define CONFIG_TSEC2 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 51 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | #ifdef CONFIG_SYS_66MHZ |
Kim Phillips | ffc21c0 | 2007-04-25 12:34:38 -0500 | [diff] [blame] | 53 | #define CONFIG_83XX_CLKIN 66666667 /* in Hz */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 54 | #elif defined(CONFIG_SYS_33MHZ) |
Kim Phillips | ffc21c0 | 2007-04-25 12:34:38 -0500 | [diff] [blame] | 55 | #define CONFIG_83XX_CLKIN 33333333 /* in Hz */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 56 | #else |
| 57 | #error Unknown oscillator frequency. |
| 58 | #endif |
| 59 | |
| 60 | #define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN |
| 61 | |
| 62 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ |
| 63 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | #define CONFIG_SYS_IMMR 0xE0000000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 65 | |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 66 | #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 67 | #define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 68 | #endif |
| 69 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #define CONFIG_SYS_MEMTEST_START 0x00001000 |
| 71 | #define CONFIG_SYS_MEMTEST_END 0x07f00000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 72 | |
| 73 | /* Early revs of this board will lock up hard when attempting |
| 74 | * to access the PMC registers, unless a JTAG debugger is |
| 75 | * connected, or some resistor modifications are made. |
| 76 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_SYS_8313ERDB_BROKEN_PMC 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 78 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 79 | #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ |
| 80 | #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 81 | |
| 82 | /* |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 83 | * Device configurations |
| 84 | */ |
| 85 | |
| 86 | /* Vitesse 7385 */ |
| 87 | |
| 88 | #ifdef CONFIG_VSC7385_ENET |
| 89 | |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 90 | #define CONFIG_TSEC1 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 91 | |
| 92 | /* The flash address and size of the VSC7385 firmware image */ |
| 93 | #define CONFIG_VSC7385_IMAGE 0xFE7FE000 |
| 94 | #define CONFIG_VSC7385_IMAGE_SIZE 8192 |
| 95 | |
| 96 | #endif |
| 97 | |
| 98 | /* |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 99 | * DDR Setup |
| 100 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ |
| 102 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE |
| 103 | #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 104 | |
| 105 | /* |
| 106 | * Manually set up DDR parameters, as this board does not |
| 107 | * seem to have the SPD connected to I2C. |
| 108 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_DDR_SIZE 128 /* MB */ |
| 110 | #define CONFIG_SYS_DDR_CONFIG ( CSCONFIG_EN \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 111 | | 0x00010000 /* TODO */ \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 112 | | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 ) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 113 | /* 0x80010102 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 114 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_DDR_TIMING_3 0x00000000 |
| 116 | #define CONFIG_SYS_DDR_TIMING_0 ( ( 0 << TIMING_CFG0_RWT_SHIFT ) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 117 | | ( 0 << TIMING_CFG0_WRT_SHIFT ) \ |
| 118 | | ( 0 << TIMING_CFG0_RRT_SHIFT ) \ |
| 119 | | ( 0 << TIMING_CFG0_WWT_SHIFT ) \ |
| 120 | | ( 2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT ) \ |
| 121 | | ( 2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT ) \ |
| 122 | | ( 8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT ) \ |
| 123 | | ( 2 << TIMING_CFG0_MRS_CYC_SHIFT ) ) |
| 124 | /* 0x00220802 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_DDR_TIMING_1 ( ( 3 << TIMING_CFG1_PRETOACT_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 126 | | ( 8 << TIMING_CFG1_ACTTOPRE_SHIFT ) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 127 | | ( 3 << TIMING_CFG1_ACTTORW_SHIFT ) \ |
| 128 | | ( 5 << TIMING_CFG1_CASLAT_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 129 | | (10 << TIMING_CFG1_REFREC_SHIFT ) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 130 | | ( 3 << TIMING_CFG1_WRREC_SHIFT ) \ |
| 131 | | ( 2 << TIMING_CFG1_ACTTOACT_SHIFT ) \ |
| 132 | | ( 2 << TIMING_CFG1_WRTORD_SHIFT ) ) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 133 | /* 0x3835a322 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_DDR_TIMING_2 ( ( 1 << TIMING_CFG2_ADD_LAT_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 135 | | ( 5 << TIMING_CFG2_CPO_SHIFT ) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 136 | | ( 2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT ) \ |
| 137 | | ( 2 << TIMING_CFG2_RD_TO_PRE_SHIFT ) \ |
| 138 | | ( 2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT ) \ |
| 139 | | ( 3 << TIMING_CFG2_CKE_PLS_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 140 | | ( 6 << TIMING_CFG2_FOUR_ACT_SHIFT) ) |
| 141 | /* 0x129048c6 */ /* P9-45,may need tuning */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_DDR_INTERVAL ( ( 1296 << SDRAM_INTERVAL_REFINT_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 143 | | ( 1280 << SDRAM_INTERVAL_BSTOPRE_SHIFT ) ) |
| 144 | /* 0x05100500 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 145 | #if defined(CONFIG_DDR_2T_TIMING) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_SDRAM_CFG ( SDRAM_CFG_SREN \ |
Kim Phillips | 3b9c20f | 2007-08-16 22:52:48 -0500 | [diff] [blame] | 147 | | SDRAM_CFG_SDRAM_TYPE_DDR2 \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 148 | | SDRAM_CFG_2T_EN \ |
| 149 | | SDRAM_CFG_DBW_32 ) |
| 150 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_SDRAM_CFG ( SDRAM_CFG_SREN \ |
Kim Phillips | 3b9c20f | 2007-08-16 22:52:48 -0500 | [diff] [blame] | 152 | | SDRAM_CFG_SDRAM_TYPE_DDR2 \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 153 | | SDRAM_CFG_32_BE ) |
| 154 | /* 0x43080000 */ |
| 155 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_SDRAM_CFG2 0x00401000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 157 | /* set burst length to 8 for 32-bit data path */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #define CONFIG_SYS_DDR_MODE ( ( 0x4448 << SDRAM_MODE_ESD_SHIFT ) \ |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 159 | | ( 0x0632 << SDRAM_MODE_SD_SHIFT ) ) |
| 160 | /* 0x44480632 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 161 | #define CONFIG_SYS_DDR_MODE_2 0x8000C000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 162 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 164 | /*0x02000000*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_DDRCDR_VALUE ( DDRCDR_EN \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 166 | | DDRCDR_PZ_NOMZ \ |
| 167 | | DDRCDR_NZ_NOMZ \ |
| 168 | | DDRCDR_M_ODR ) |
| 169 | |
| 170 | /* |
| 171 | * FLASH on the Local Bus |
| 172 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 174 | #define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ |
| 176 | #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ |
| 177 | #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ |
| 178 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ |
| 179 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 180 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 181 | #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE | /* flash Base address */ \ |
Wolfgang Denk | 4892339 | 2007-05-16 01:16:53 +0200 | [diff] [blame] | 182 | (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ |
| 183 | BR_V) /* valid */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 184 | #define CONFIG_SYS_NOR_OR_PRELIM ( 0xFF800000 /* 8 MByte */ \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 185 | | OR_GPCM_XACS \ |
| 186 | | OR_GPCM_SCY_9 \ |
| 187 | | OR_GPCM_EHTR \ |
| 188 | | OR_GPCM_EAD ) |
| 189 | /* 0xFF006FF7 TODO SLOW 16 MB flash size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE /* window base at flash base */ |
| 191 | #define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000017 /* 16 MB window size */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 192 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ |
| 194 | #define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 197 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 198 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 199 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 200 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 201 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL) |
| 202 | #define CONFIG_SYS_RAMBOOT |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 203 | #endif |
| 204 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 205 | #define CONFIG_SYS_INIT_RAM_LOCK 1 |
| 206 | #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ |
| 207 | #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 208 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 209 | #define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ |
| 210 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) |
| 211 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 212 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 213 | /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ |
| 214 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ |
| 215 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 216 | |
| 217 | /* |
| 218 | * Local Bus LCRR and LBCR regs |
| 219 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 220 | #define CONFIG_SYS_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4 |
| 221 | #define CONFIG_SYS_LBC_LBCR ( 0x00040000 /* TODO */ \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 222 | | (0xFF << LBCR_BMT_SHIFT) \ |
| 223 | | 0xF ) /* 0x0004ff0f */ |
| 224 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 225 | #define CONFIG_SYS_LBC_MRTPR 0x20000000 /*TODO */ /* LB refresh timer prescal, 266MHz/32 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 226 | |
Marcel Ziswiler | aea6856 | 2007-12-30 03:30:46 +0100 | [diff] [blame] | 227 | /* drivers/mtd/nand/nand.c */ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 228 | #ifdef CONFIG_NAND_SPL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 229 | #define CONFIG_SYS_NAND_BASE 0xFFF00000 |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 230 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | #define CONFIG_SYS_NAND_BASE 0xE2800000 |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 232 | #endif |
| 233 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 234 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 235 | #define CONFIG_MTD_NAND_VERIFY_WRITE |
Scott Wood | b7dac21 | 2008-06-26 14:06:52 -0500 | [diff] [blame] | 236 | #define CONFIG_CMD_NAND 1 |
| 237 | #define CONFIG_NAND_FSL_ELBC 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 238 | #define CONFIG_SYS_NAND_BLOCK_SIZE 16384 |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 239 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 240 | #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) |
| 241 | #define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000 |
| 242 | #define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 |
| 243 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 16384 |
| 244 | #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 245 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 246 | #define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \ |
Wolfgang Denk | 4892339 | 2007-05-16 01:16:53 +0200 | [diff] [blame] | 247 | | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ |
| 248 | | BR_PS_8 /* Port Size = 8 bit */ \ |
| 249 | | BR_MS_FCM /* MSEL = FCM */ \ |
| 250 | | BR_V ) /* valid */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 251 | #define CONFIG_SYS_NAND_OR_PRELIM ( 0xFFFF8000 /* length 32K */ \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 252 | | OR_FCM_CSCT \ |
| 253 | | OR_FCM_CST \ |
| 254 | | OR_FCM_CHT \ |
| 255 | | OR_FCM_SCY_1 \ |
| 256 | | OR_FCM_TRLX \ |
| 257 | | OR_FCM_EHTR ) |
| 258 | /* 0xFFFF8396 */ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 259 | |
| 260 | #ifdef CONFIG_NAND_U_BOOT |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 261 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM |
| 262 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM |
| 263 | #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM |
| 264 | #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NOR_OR_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 265 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 266 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM |
| 267 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NOR_OR_PRELIM |
| 268 | #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM |
| 269 | #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 270 | #endif |
| 271 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 272 | #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE |
| 273 | #define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 274 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 275 | #define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM |
| 276 | #define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 277 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 278 | /* local bus read write buffer mapping */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 279 | #define CONFIG_SYS_BR3_PRELIM 0xFA000801 /* map at 0xFA000000 */ |
| 280 | #define CONFIG_SYS_OR3_PRELIM 0xFFFF8FF7 /* 32kB */ |
| 281 | #define CONFIG_SYS_LBLAWBAR3_PRELIM 0xFA000000 |
| 282 | #define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000000E /* 32KB */ |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 283 | |
| 284 | /* Vitesse 7385 */ |
| 285 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 286 | #define CONFIG_SYS_VSC7385_BASE 0xF0000000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 287 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 288 | #ifdef CONFIG_VSC7385_ENET |
| 289 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 290 | #define CONFIG_SYS_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */ |
| 291 | #define CONFIG_SYS_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/ |
| 292 | #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE/* Access window base at VSC7385 base */ |
| 293 | #define CONFIG_SYS_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 294 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 295 | #endif |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 296 | |
| 297 | /* pass open firmware flat tree */ |
Kim Phillips | c845449 | 2007-08-15 22:30:39 -0500 | [diff] [blame] | 298 | #define CONFIG_OF_LIBFDT 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 299 | #define CONFIG_OF_BOARD_SETUP 1 |
Kim Phillips | fd47a74 | 2007-12-20 14:09:22 -0600 | [diff] [blame] | 300 | #define CONFIG_OF_STDOUT_VIA_ALIAS 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 301 | |
| 302 | /* |
| 303 | * Serial Port |
| 304 | */ |
| 305 | #define CONFIG_CONS_INDEX 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 306 | #define CONFIG_SYS_NS16550 |
| 307 | #define CONFIG_SYS_NS16550_SERIAL |
| 308 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 309 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 310 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 311 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} |
| 312 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 313 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) |
| 314 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 315 | |
| 316 | /* Use the HUSH parser */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 317 | #define CONFIG_SYS_HUSH_PARSER |
| 318 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 319 | |
| 320 | /* I2C */ |
| 321 | #define CONFIG_HARD_I2C /* I2C with hardware support*/ |
| 322 | #define CONFIG_FSL_I2C |
| 323 | #define CONFIG_I2C_MULTI_BUS |
| 324 | #define CONFIG_I2C_CMD_TREE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 325 | #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ |
| 326 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 327 | #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ |
| 328 | #define CONFIG_SYS_I2C_OFFSET 0x3000 |
| 329 | #define CONFIG_SYS_I2C2_OFFSET 0x3100 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 330 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 331 | /* |
| 332 | * General PCI |
| 333 | * Addresses are mapped 1-1. |
| 334 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 335 | #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 |
| 336 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 337 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ |
| 338 | #define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 |
| 339 | #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE |
| 340 | #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ |
| 341 | #define CONFIG_SYS_PCI1_IO_BASE 0x00000000 |
| 342 | #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 |
| 343 | #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 344 | |
| 345 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 346 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 347 | |
| 348 | /* |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 349 | * TSEC |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 350 | */ |
| 351 | #define CONFIG_TSEC_ENET /* TSEC ethernet support */ |
| 352 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 353 | #define CONFIG_NET_MULTI |
| 354 | #define CONFIG_GMII /* MII PHY management */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 355 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 356 | #ifdef CONFIG_TSEC1 |
| 357 | #define CONFIG_HAS_ETH0 |
Kim Phillips | 177e58f | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 358 | #define CONFIG_TSEC1_NAME "TSEC0" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 359 | #define CONFIG_SYS_TSEC1_OFFSET 0x24000 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 360 | #define TSEC1_PHY_ADDR 0x1c |
| 361 | #define TSEC1_FLAGS TSEC_GIGABIT |
| 362 | #define TSEC1_PHYIDX 0 |
| 363 | #endif |
| 364 | |
| 365 | #ifdef CONFIG_TSEC2 |
| 366 | #define CONFIG_HAS_ETH1 |
Kim Phillips | 177e58f | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 367 | #define CONFIG_TSEC2_NAME "TSEC1" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 368 | #define CONFIG_SYS_TSEC2_OFFSET 0x25000 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 369 | #define TSEC2_PHY_ADDR 4 |
| 370 | #define TSEC2_FLAGS TSEC_GIGABIT |
| 371 | #define TSEC2_PHYIDX 0 |
| 372 | #endif |
| 373 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 374 | |
| 375 | /* Options are: TSEC[0-1] */ |
| 376 | #define CONFIG_ETHPRIME "TSEC1" |
| 377 | |
| 378 | /* |
| 379 | * Configure on-board RTC |
| 380 | */ |
| 381 | #define CONFIG_RTC_DS1337 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 382 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 383 | |
| 384 | /* |
| 385 | * Environment |
| 386 | */ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 387 | #if defined(CONFIG_NAND_U_BOOT) |
Jean-Christophe PLAGNIOL-VILLARD | dda84dd | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 388 | #define CONFIG_ENV_IS_IN_NAND 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 389 | #define CONFIG_ENV_OFFSET (512 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 390 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 391 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 392 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| 393 | #define CONFIG_ENV_RANGE (CONFIG_ENV_SECT_SIZE * 4) |
| 394 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 395 | #elif !defined(CONFIG_SYS_RAMBOOT) |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 396 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 397 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 398 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */ |
| 399 | #define CONFIG_ENV_SIZE 0x2000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 400 | |
| 401 | /* Address and size of Redundant Environment Sector */ |
| 402 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 68a8756 | 2008-09-10 22:48:00 +0200 | [diff] [blame] | 403 | #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 404 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 405 | #define CONFIG_ENV_SIZE 0x2000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 406 | #endif |
| 407 | |
| 408 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 409 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 410 | |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 411 | /* |
Jon Loeliger | 5c4ddae | 2007-07-10 10:12:10 -0500 | [diff] [blame] | 412 | * BOOTP options |
| 413 | */ |
| 414 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 415 | #define CONFIG_BOOTP_BOOTPATH |
| 416 | #define CONFIG_BOOTP_GATEWAY |
| 417 | #define CONFIG_BOOTP_HOSTNAME |
| 418 | |
| 419 | |
| 420 | /* |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 421 | * Command line configuration. |
| 422 | */ |
| 423 | #include <config_cmd_default.h> |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 424 | |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 425 | #define CONFIG_CMD_PING |
| 426 | #define CONFIG_CMD_DHCP |
| 427 | #define CONFIG_CMD_I2C |
| 428 | #define CONFIG_CMD_MII |
| 429 | #define CONFIG_CMD_DATE |
| 430 | #define CONFIG_CMD_PCI |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 431 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 432 | #if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT) |
Mike Frysinger | 78dcaf4 | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 433 | #undef CONFIG_CMD_SAVEENV |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 434 | #undef CONFIG_CMD_LOADS |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 435 | #endif |
| 436 | |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 437 | #define CONFIG_CMDLINE_EDITING 1 |
| 438 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 439 | |
| 440 | /* |
| 441 | * Miscellaneous configurable options |
| 442 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 443 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 444 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
| 445 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
| 446 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 447 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 448 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 449 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 450 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 451 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 452 | |
| 453 | /* |
| 454 | * For booting Linux, the board info and command line data |
| 455 | * have to be in the first 8 MB of memory, since this is |
| 456 | * the maximum mapped by the Linux kernel during initialization. |
| 457 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 458 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 459 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 460 | #define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 461 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 462 | #ifdef CONFIG_SYS_66MHZ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 463 | |
| 464 | /* 66MHz IN, 133MHz CSB, 266 DDR, 266 CORE */ |
| 465 | /* 0x62040000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 466 | #define CONFIG_SYS_HRCW_LOW (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 467 | 0x20000000 /* reserved, must be set */ |\ |
| 468 | HRCWL_DDRCM |\ |
| 469 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 470 | HRCWL_DDR_TO_SCB_CLK_2X1 |\ |
| 471 | HRCWL_CSB_TO_CLKIN_2X1 |\ |
| 472 | HRCWL_CORE_TO_CSB_2X1) |
| 473 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 474 | #define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 475 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 476 | #elif defined(CONFIG_SYS_33MHZ) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 477 | |
| 478 | /* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */ |
| 479 | /* 0x65040000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 480 | #define CONFIG_SYS_HRCW_LOW (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 481 | 0x20000000 /* reserved, must be set */ |\ |
| 482 | HRCWL_DDRCM |\ |
| 483 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 484 | HRCWL_DDR_TO_SCB_CLK_2X1 |\ |
| 485 | HRCWL_CSB_TO_CLKIN_5X1 |\ |
| 486 | HRCWL_CORE_TO_CSB_2X1) |
| 487 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 488 | #define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 489 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 490 | #endif |
| 491 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 492 | #define CONFIG_SYS_HRCW_HIGH_BASE (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 493 | HRCWH_PCI_HOST |\ |
| 494 | HRCWH_PCI1_ARBITER_ENABLE |\ |
| 495 | HRCWH_CORE_ENABLE |\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 496 | HRCWH_BOOTSEQ_DISABLE |\ |
| 497 | HRCWH_SW_WATCHDOG_DISABLE |\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 498 | HRCWH_TSEC1M_IN_RGMII |\ |
| 499 | HRCWH_TSEC2M_IN_RGMII |\ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 500 | HRCWH_BIG_ENDIAN) |
| 501 | |
| 502 | #ifdef CONFIG_NAND_SPL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 503 | #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\ |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 504 | HRCWH_FROM_0XFFF00100 |\ |
| 505 | HRCWH_ROM_LOC_NAND_SP_8BIT |\ |
| 506 | HRCWH_RL_EXT_NAND) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 507 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 508 | #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\ |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 509 | HRCWH_FROM_0X00000100 |\ |
| 510 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 511 | HRCWH_RL_EXT_LEGACY) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 512 | #endif |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 513 | |
| 514 | /* System IO Config */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 515 | #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ |
| 516 | #define CONFIG_SYS_SICRL SICRL_USBDR /* Enable Internal USB Phy */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 517 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 518 | #define CONFIG_SYS_HID0_INIT 0x000000000 |
| 519 | #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ |
Wolfgang Denk | 4892339 | 2007-05-16 01:16:53 +0200 | [diff] [blame] | 520 | HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 521 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 522 | #define CONFIG_SYS_HID2 HID2_HBE |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 523 | |
Becky Bruce | 03ea1be | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 524 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 525 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 526 | /* DDR @ 0x00000000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 527 | #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10) |
| 528 | #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 529 | |
| 530 | /* PCI @ 0x80000000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 531 | #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10) |
| 532 | #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) |
| 533 | #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) |
| 534 | #define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 535 | |
| 536 | /* PCI2 not supported on 8313 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 537 | #define CONFIG_SYS_IBAT3L (0) |
| 538 | #define CONFIG_SYS_IBAT3U (0) |
| 539 | #define CONFIG_SYS_IBAT4L (0) |
| 540 | #define CONFIG_SYS_IBAT4U (0) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 541 | |
| 542 | /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 543 | #define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) |
| 544 | #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 545 | |
| 546 | /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ |
Scott Wood | 7acde32 | 2009-03-31 17:49:36 -0500 | [diff] [blame] | 547 | #define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_GUARDEDSTORAGE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 548 | #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 549 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 550 | #define CONFIG_SYS_IBAT7L (0) |
| 551 | #define CONFIG_SYS_IBAT7U (0) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 552 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 553 | #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L |
| 554 | #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U |
| 555 | #define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L |
| 556 | #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U |
| 557 | #define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L |
| 558 | #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U |
| 559 | #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L |
| 560 | #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U |
| 561 | #define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L |
| 562 | #define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U |
| 563 | #define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L |
| 564 | #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U |
| 565 | #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L |
| 566 | #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |
| 567 | #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L |
| 568 | #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 569 | |
| 570 | /* |
| 571 | * Internal Definitions |
| 572 | * |
| 573 | * Boot Flags |
| 574 | */ |
| 575 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
| 576 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 577 | |
| 578 | /* |
| 579 | * Environment Configuration |
| 580 | */ |
| 581 | #define CONFIG_ENV_OVERWRITE |
| 582 | |
| 583 | #define CONFIG_ETHADDR 00:E0:0C:00:95:01 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 584 | #define CONFIG_ETH1ADDR 00:E0:0C:00:95:02 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 585 | |
| 586 | #define CONFIG_IPADDR 10.0.0.2 |
| 587 | #define CONFIG_SERVERIP 10.0.0.1 |
| 588 | #define CONFIG_GATEWAYIP 10.0.0.1 |
| 589 | #define CONFIG_NETMASK 255.0.0.0 |
| 590 | #define CONFIG_NETDEV eth1 |
| 591 | |
| 592 | #define CONFIG_HOSTNAME mpc8313erdb |
| 593 | #define CONFIG_ROOTPATH /nfs/root/path |
| 594 | #define CONFIG_BOOTFILE uImage |
| 595 | #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ |
| 596 | #define CONFIG_FDTFILE mpc8313erdb.dtb |
| 597 | |
Kim Phillips | aa07b71 | 2008-04-24 14:07:38 -0500 | [diff] [blame] | 598 | #define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */ |
Kim Phillips | 7570428 | 2008-09-24 08:46:25 -0500 | [diff] [blame] | 599 | #define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 600 | #define CONFIG_BAUDRATE 115200 |
| 601 | |
| 602 | #define XMK_STR(x) #x |
| 603 | #define MK_STR(x) XMK_STR(x) |
| 604 | |
| 605 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 606 | "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 607 | "ethprime=TSEC1\0" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 608 | "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ |
| 609 | "tftpflash=tftpboot $loadaddr $uboot; " \ |
| 610 | "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ |
| 611 | "erase " MK_STR(TEXT_BASE) " +$filesize; " \ |
| 612 | "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ |
| 613 | "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ |
| 614 | "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 615 | "fdtaddr=400000\0" \ |
| 616 | "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ |
| 617 | "console=ttyS0\0" \ |
| 618 | "setbootargs=setenv bootargs " \ |
| 619 | "root=$rootdev rw console=$console,$baudrate $othbootargs\0" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 620 | "setipargs=setenv bootargs nfsroot=$serverip:$rootpath " \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 621 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ |
| 622 | "root=$rootdev rw console=$console,$baudrate $othbootargs\0" |
| 623 | |
| 624 | #define CONFIG_NFSBOOTCOMMAND \ |
| 625 | "setenv rootdev /dev/nfs;" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 626 | "run setbootargs;" \ |
| 627 | "run setipargs;" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 628 | "tftp $loadaddr $bootfile;" \ |
| 629 | "tftp $fdtaddr $fdtfile;" \ |
| 630 | "bootm $loadaddr - $fdtaddr" |
| 631 | |
| 632 | #define CONFIG_RAMBOOTCOMMAND \ |
| 633 | "setenv rootdev /dev/ram;" \ |
| 634 | "run setbootargs;" \ |
| 635 | "tftp $ramdiskaddr $ramdiskfile;" \ |
| 636 | "tftp $loadaddr $bootfile;" \ |
| 637 | "tftp $fdtaddr $fdtfile;" \ |
| 638 | "bootm $loadaddr $ramdiskaddr $fdtaddr" |
| 639 | |
| 640 | #undef MK_STR |
| 641 | #undef XMK_STR |
| 642 | |
| 643 | #endif /* __CONFIG_H */ |