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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04002/*
3 * (C) Copyright 2010
4 * ISEE 2007 SL, <www.iseebcn.com>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04005 */
6#include <common.h>
Enric Balletbo i Serraa66c8872015-01-28 15:01:32 +01007#include <status_led.h>
Simon Glassbc0f4ea2014-10-22 21:37:15 -06008#include <dm.h>
9#include <ns16550.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040010#include <twl4030.h>
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000011#include <netdev.h>
Ladislav Michlac870362016-07-12 20:28:34 +020012#include <spl.h>
Sanjeev Premi7b3dc822011-09-08 10:51:01 -040013#include <asm/gpio.h>
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000014#include <asm/io.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040015#include <asm/arch/mem.h>
Enric Balletbo i Serrada898a92010-11-04 15:34:33 -040016#include <asm/arch/mmc_host_def.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040017#include <asm/arch/mux.h>
18#include <asm/arch/sys_proto.h>
Ladislav Michlc44e29f2016-07-12 20:28:33 +020019#include <linux/mtd/mtd.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090020#include <linux/mtd/rawnand.h>
Ladislav Michl3e349282016-07-12 20:28:31 +020021#include <linux/mtd/onenand.h>
22#include <jffs2/load_kernel.h>
Ladislav Michlbe8e06d2017-01-09 11:21:06 +010023#include <mtd_node.h>
24#include <fdt_support.h>
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000025#include "igep00x0.h"
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040026
Simon Glassbc0f4ea2014-10-22 21:37:15 -060027static const struct ns16550_platdata igep_serial = {
Adam Fordd1e22fa2016-03-07 21:08:49 -060028 .base = OMAP34XX_UART3,
29 .reg_shift = 2,
Heiko Schocher06f108e2017-01-18 08:05:49 +010030 .clock = V_NS16550_CLK,
31 .fcr = UART_FCR_DEFVAL,
Simon Glassbc0f4ea2014-10-22 21:37:15 -060032};
33
34U_BOOT_DEVICE(igep_uart) = {
Thomas Chou52ac4432015-11-19 21:48:12 +080035 "ns16550_serial",
Simon Glassbc0f4ea2014-10-22 21:37:15 -060036 &igep_serial
37};
38
Pau Pajuelo4ddc3092017-08-17 03:09:14 +020039/*
40 * Routine: get_board_revision
41 * Description: GPIO_28 and GPIO_129 are used to read board and revision from
42 * IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
43 * IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
44 * this functionality is shared by USB HOST.
45 * Once USB reset is applied, U-boot configures these pins as input pullup to
46 * detect board and revision:
47 * IGEP0020-RF = 0b00
48 * IGEP0020-RC = 0b01
49 * IGEP0030-RG = 0b10
50 * IGEP0030-RE = 0b11
51 */
52static int get_board_revision(void)
53{
54 int revision;
55
56 gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
57 "igep0030_usb_transceiver_reset");
58 gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
59
60 gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
61 gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
62 revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
63 gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
64
65 gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
66 "igep00x0_revision_detection");
67 gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
68 revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
69 gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
70
71 gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
72
73 return revision;
74}
75
Ladislav Michl3e349282016-07-12 20:28:31 +020076int onenand_board_init(struct mtd_info *mtd)
77{
78 if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
79 struct onenand_chip *this = mtd->priv;
80 this->base = (void *)CONFIG_SYS_ONENAND_BASE;
81 return 0;
82 }
83 return 1;
84}
85
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000086#if defined(CONFIG_CMD_NET)
Ladislav Michl6399e5e2016-01-04 23:07:59 +010087static void reset_net_chip(int gpio)
88{
89 if (!gpio_request(gpio, "eth nrst")) {
90 gpio_direction_output(gpio, 1);
91 udelay(1);
92 gpio_set_value(gpio, 0);
93 udelay(40);
94 gpio_set_value(gpio, 1);
95 mdelay(10);
96 }
97}
98
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040099/*
100 * Routine: setup_net_chip
101 * Description: Setting up the configuration GPMC registers specific to the
102 * Ethernet hardware.
103 */
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400104static void setup_net_chip(void)
105{
106 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
Ladislav Michl11279dc2016-07-12 20:28:28 +0200107 static const u32 gpmc_lan_config[] = {
108 NET_LAN9221_GPMC_CONFIG1,
109 NET_LAN9221_GPMC_CONFIG2,
110 NET_LAN9221_GPMC_CONFIG3,
111 NET_LAN9221_GPMC_CONFIG4,
112 NET_LAN9221_GPMC_CONFIG5,
113 NET_LAN9221_GPMC_CONFIG6,
114 };
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400115
Ladislav Michl6399e5e2016-01-04 23:07:59 +0100116 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
117 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400118
119 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
120 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
121 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
122 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
123 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
124 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
125 &ctrl_base->gpmc_nadv_ale);
126
Ladislav Michl6399e5e2016-01-04 23:07:59 +0100127 reset_net_chip(64);
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400128}
Ladislav Michl11279dc2016-07-12 20:28:28 +0200129
130int board_eth_init(bd_t *bis)
131{
132#ifdef CONFIG_SMC911X
133 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
134#else
135 return 0;
136#endif
137}
Javier Martinez Canillase9b14522012-12-27 01:35:56 +0000138#else
139static inline void setup_net_chip(void) {}
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400140#endif
141
Ladislav Michlbe8e06d2017-01-09 11:21:06 +0100142#ifdef CONFIG_OF_BOARD_SETUP
Ladislav Michl4e7241a2017-02-19 00:24:49 +0100143static int ft_enable_by_compatible(void *blob, char *compat, int enable)
144{
145 int off = fdt_node_offset_by_compatible(blob, -1, compat);
146 if (off < 0)
147 return off;
148
149 if (enable)
150 fdt_status_okay(blob, off);
151 else
152 fdt_status_disabled(blob, off);
153
154 return 0;
155}
156
Ladislav Michlbe8e06d2017-01-09 11:21:06 +0100157int ft_board_setup(void *blob, bd_t *bd)
158{
159#ifdef CONFIG_FDT_FIXUP_PARTITIONS
160 static struct node_info nodes[] = {
161 { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
162 { "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
163 };
164
165 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
166#endif
Ladislav Michl4e7241a2017-02-19 00:24:49 +0100167 ft_enable_by_compatible(blob, "ti,omap2-nand",
168 gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
169 ft_enable_by_compatible(blob, "ti,omap2-onenand",
170 gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
171
Ladislav Michlbe8e06d2017-01-09 11:21:06 +0100172 return 0;
173}
174#endif
175
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200176void set_led(void)
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200177{
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200178 switch (get_board_revision()) {
179 case 0:
180 case 1:
181 gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
182 gpio_direction_output(IGEP0020_GPIO_LED, 1);
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200183 break;
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200184 case 2:
185 case 3:
186 gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
187 gpio_direction_output(IGEP0030_GPIO_LED, 0);
188 break;
189 default:
190 /* Should not happen... */
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200191 break;
192 }
193}
194
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200195void set_boardname(void)
196{
197 char rev[5] = { 'F','C','G','E', };
198 int i = get_board_revision();
199
200 rev[i+1] = 0;
201 env_set("board_rev", rev + i);
202 env_set("board_name", i < 2 ? "igep0020" : "igep0030");
203}
204
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400205/*
206 * Routine: misc_init_r
207 * Description: Configure board specific parts
208 */
209int misc_init_r(void)
210{
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200211 t2_t *t2_base = (t2_t *)T2_BASE;
212 u32 pbias_lite;
213
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400214 twl4030_power_init();
215
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200216 /* set VSIM to 1.8V */
217 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
218 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
219 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
220 TWL4030_PM_RECEIVER_DEV_GRP_P1);
221
222 /* set up dual-voltage GPIOs to 1.8V */
223 pbias_lite = readl(&t2_base->pbias_lite);
224 pbias_lite &= ~PBIASLITEVMODE1;
225 pbias_lite |= PBIASLITEPWRDNZ1;
226 writel(pbias_lite, &t2_base->pbias_lite);
227 if (get_cpu_family() == CPU_OMAP36XX)
228 writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
229 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
230 OMAP34XX_CTRL_WKUP_CTRL);
231
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400232 setup_net_chip();
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400233
Paul Kocialkowski6bc318e2015-08-27 19:37:13 +0200234 omap_die_id_display();
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400235
Pau Pajuelo4ddc3092017-08-17 03:09:14 +0200236 set_led();
237
238 set_boardname();
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200239
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400240 return 0;
241}
242
Ladislav Michlc44e29f2016-07-12 20:28:33 +0200243void board_mtdparts_default(const char **mtdids, const char **mtdparts)
244{
245 struct mtd_info *mtd = get_mtd_device(NULL, 0);
246 if (mtd) {
247 static char ids[24];
248 static char parts[48];
249 const char *linux_name = "omap2-nand";
250 if (strncmp(mtd->name, "onenand0", 8) == 0)
251 linux_name = "omap2-onenand";
252 snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
253 snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
254 linux_name, 4 * mtd->erasesize >> 10);
255 *mtdids = ids;
256 *mtdparts = parts;
257 }
258}