| Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Boundary Devices |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not write to the Free Software |
| 19 | * Foundation Inc. 51 Franklin Street Fifth Floor Boston, |
| 20 | * MA 02110-1301 USA |
| 21 | * |
| 22 | * Device Configuration Data (DCD) |
| 23 | * |
| 24 | * Each entry must have the format: |
| 25 | * Addr-type Address Value |
| 26 | * |
| 27 | * where: |
| 28 | * Addr-type register length (1,2 or 4 bytes) |
| 29 | * Address absolute address of the register |
| 30 | * value value to be stored in the register |
| 31 | */ |
| 32 | |
| 33 | /* set the default clock gate to save power */ |
| 34 | DATA 4, CCM_CCGR0, 0x00C03F3F |
| 35 | DATA 4, CCM_CCGR1, 0x0030FC03 |
| 36 | DATA 4, CCM_CCGR2, 0x0FFFC000 |
| 37 | DATA 4, CCM_CCGR3, 0x3FF00000 |
| 38 | DATA 4, CCM_CCGR4, 0x00FFF300 |
| 39 | DATA 4, CCM_CCGR5, 0x0F0000C3 |
| 40 | DATA 4, CCM_CCGR6, 0x000003FF |
| 41 | |
| 42 | /* enable AXI cache for VDOA/VPU/IPU */ |
| 43 | DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF |
| 44 | /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ |
| 45 | DATA 4, MX6_IOMUXC_GPR6, 0x007F007F |
| 46 | DATA 4, MX6_IOMUXC_GPR7, 0x007F007F |
| Fabio Estevam | d92fe0e | 2013-04-17 13:09:56 +0000 | [diff] [blame] | 47 | |
| 48 | /* |
| 49 | * Setup CCM_CCOSR register as follows: |
| 50 | * |
| 51 | * cko1_en = 1 --> CKO1 enabled |
| 52 | * cko1_div = 111 --> divide by 8 |
| 53 | * cko1_sel = 1011 --> ahb_clk_root |
| 54 | * |
| 55 | * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz |
| 56 | */ |
| 57 | DATA 4, CCM_CCOSR, 0x000000fb |