| Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 - 2015 Xilinx, Inc. |
| 3 | * Michal Simek <michal.simek@xilinx.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef _ASM_ARCH_SYS_PROTO_H |
| 9 | #define _ASM_ARCH_SYS_PROTO_H |
| 10 | |
| Siva Durga Prasad Paladugu | baa2035 | 2016-11-15 16:15:42 +0530 | [diff] [blame] | 11 | #ifndef CONFIG_CLK_ZYNQMP |
| Michal Simek | c68918e | 2015-07-23 12:03:55 +0200 | [diff] [blame] | 12 | /* Setup clk for network */ |
| 13 | static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) |
| 14 | { |
| 15 | } |
| Siva Durga Prasad Paladugu | baa2035 | 2016-11-15 16:15:42 +0530 | [diff] [blame] | 16 | #endif |
| Michal Simek | c68918e | 2015-07-23 12:03:55 +0200 | [diff] [blame] | 17 | |
| Michal Simek | f2e373f | 2015-07-22 09:27:11 +0200 | [diff] [blame] | 18 | int zynq_slcr_get_mio_pin_status(const char *periph); |
| Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 19 | |
| 20 | unsigned int zynqmp_get_silicon_version(void); |
| 21 | |
| Michal Simek | 72536fd | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 22 | void psu_init(void); |
| 23 | |
| Michal Simek | 456e454 | 2017-01-09 10:05:16 +0100 | [diff] [blame] | 24 | void handoff_setup(void); |
| 25 | |
| Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 26 | #endif /* _ASM_ARCH_SYS_PROTO_H */ |