blob: 1736426f46547e117a6ab313ff162a30f20bdc21 [file] [log] [blame]
Akshay Bhat9301aea2016-07-29 11:44:46 -04001/*
2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __ADVANTECH_DMSBA16_CONFIG_H
10#define __ADVANTECH_DMSBA16_CONFIG_H
11
12#include <asm/arch/imx-regs.h>
13#include <asm/imx-common/gpio.h>
14
15#define CONFIG_BOARD_NAME "Advantech DMS-BA16"
Akshay Bhat9301aea2016-07-29 11:44:46 -040016
17#define CONFIG_MXC_UART_BASE UART4_BASE
Simon Glass4694a742016-10-17 20:12:39 -060018#define CONSOLE_DEV "ttymxc3"
Akshay Bhat9301aea2016-07-29 11:44:46 -040019#define CONFIG_EXTRA_BOOTARGS "panic=10"
20
21#define CONFIG_BOOT_DIR ""
22#define CONFIG_LOADCMD "fatload"
23#define CONFIG_RFSPART "2"
24
25#define CONFIG_SUPPORT_EMMC_BOOT
26
27#include "mx6_common.h"
28#include <linux/sizes.h>
29
Akshay Bhat9301aea2016-07-29 11:44:46 -040030#define CONFIG_CMDLINE_TAG
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
35
Akshay Bhat9301aea2016-07-29 11:44:46 -040036#define CONFIG_MXC_GPIO
37#define CONFIG_MXC_UART
38
39#define CONFIG_CMD_FUSE
40#define CONFIG_MXC_OCOTP
41
42/* SATA Configs */
43#define CONFIG_CMD_SATA
44#define CONFIG_DWC_AHSATA
45#define CONFIG_SYS_SATA_MAX_DEVICE 1
46#define CONFIG_DWC_AHSATA_PORT_ID 0
47#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
48#define CONFIG_LBA48
49#define CONFIG_LIBATA
50
51/* MMC Configs */
52#define CONFIG_FSL_ESDHC
53#define CONFIG_FSL_USDHC
54#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Akshay Bhat9301aea2016-07-29 11:44:46 -040055#define CONFIG_BOUNCE_BUFFER
Akshay Bhat9301aea2016-07-29 11:44:46 -040056
57/* USB Configs */
58#define CONFIG_USB_EHCI
59#define CONFIG_USB_EHCI_MX6
60#define CONFIG_USB_STORAGE
61#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
62#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
63#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
64#define CONFIG_MXC_USB_FLAGS 0
Akshay Bhat9301aea2016-07-29 11:44:46 -040065#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
66
67#define CONFIG_USBD_HS
68#define CONFIG_USB_FUNCTION_MASS_STORAGE
69#define CONFIG_USB_GADGET_VBUS_DRAW 2
70
71/* Networking Configs */
72#define CONFIG_FEC_MXC
73#define CONFIG_MII
74#define IMX_FEC_BASE ENET_BASE_ADDR
75#define CONFIG_FEC_XCV_TYPE RGMII
76#define CONFIG_ETHPRIME "FEC"
77#define CONFIG_FEC_MXC_PHYADDR 4
78#define CONFIG_PHYLIB
79#define CONFIG_PHY_ATHEROS
80
81/* Serial Flash */
82#ifdef CONFIG_CMD_SF
83#define CONFIG_MXC_SPI
84#define CONFIG_SF_DEFAULT_BUS 0
85#define CONFIG_SF_DEFAULT_CS 0
86#define CONFIG_SF_DEFAULT_SPEED 20000000
87#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
88#endif
89
90/* allow to overwrite serial and ethaddr */
91#define CONFIG_ENV_OVERWRITE
92#define CONFIG_CONS_INDEX 1
93#define CONFIG_BAUDRATE 115200
94
95/* Command definition */
96#define CONFIG_CMD_BMODE
97
98#define CONFIG_LOADADDR 0x12000000
99#define CONFIG_SYS_TEXT_BASE 0x17800000
100
101#define CONFIG_EXTRA_ENV_SETTINGS \
102 "script=boot.scr\0" \
103 "image=" CONFIG_BOOT_DIR "/uImage\0" \
104 "uboot=u-boot.imx\0" \
105 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
106 "fdt_addr=0x18000000\0" \
107 "boot_fdt=yes\0" \
108 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600109 "console=" CONSOLE_DEV "\0" \
Akshay Bhat9301aea2016-07-29 11:44:46 -0400110 "fdt_high=0xffffffff\0" \
111 "initrd_high=0xffffffff\0" \
112 "sddev=0\0" \
113 "emmcdev=1\0" \
114 "partnum=1\0" \
115 "loadcmd=" CONFIG_LOADCMD "\0" \
116 "rfspart=" CONFIG_RFSPART "\0" \
117 "update_sd_firmware=" \
118 "if test ${ip_dyn} = yes; then " \
119 "setenv get_cmd dhcp; " \
120 "else " \
121 "setenv get_cmd tftp; " \
122 "fi; " \
123 "if mmc dev ${mmcdev}; then " \
124 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
125 "setexpr fw_sz ${filesize} / 0x200; " \
126 "setexpr fw_sz ${fw_sz} + 1; " \
127 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
128 "fi; " \
129 "fi\0" \
130 "update_sf_uboot=" \
131 "if tftp $loadaddr $uboot; then " \
132 "sf probe; " \
133 "sf erase 0 0xC0000; " \
134 "sf write $loadaddr 0x400 $filesize; " \
135 "echo 'U-Boot upgraded. Please reset'; " \
136 "fi\0" \
137 "setargs=setenv bootargs console=${console},${baudrate} " \
138 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
139 "loadbootscript=" \
140 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
141 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
142 " source\0" \
143 "loadimage=" \
144 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
145 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
146 "tryboot=" \
147 "if run loadbootscript; then " \
148 "run bootscript; " \
149 "else " \
150 "if run loadimage; then " \
151 "run doboot; " \
152 "fi; " \
153 "fi;\0" \
154 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
155 "run setargs; " \
156 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
157 "if run loadfdt; then " \
158 "bootm ${loadaddr} - ${fdt_addr}; " \
159 "else " \
160 "if test ${boot_fdt} = try; then " \
161 "bootm; " \
162 "else " \
163 "echo WARN: Cannot load the DT; " \
164 "fi; " \
165 "fi; " \
166 "else " \
167 "bootm; " \
168 "fi;\0" \
169 "netargs=setenv bootargs console=${console},${baudrate} " \
170 "root=/dev/nfs " \
171 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
172 "netboot=echo Booting from net ...; " \
173 "run netargs; " \
174 "if test ${ip_dyn} = yes; then " \
175 "setenv get_cmd dhcp; " \
176 "else " \
177 "setenv get_cmd tftp; " \
178 "fi; " \
179 "${get_cmd} ${image}; " \
180 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
181 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
182 "bootm ${loadaddr} - ${fdt_addr}; " \
183 "else " \
184 "if test ${boot_fdt} = try; then " \
185 "bootm; " \
186 "else " \
187 "echo WARN: Cannot load the DT; " \
188 "fi; " \
189 "fi; " \
190 "else " \
191 "bootm; " \
192 "fi;\0" \
193
194#define CONFIG_BOOTCOMMAND \
195 "usb start; " \
196 "setenv dev usb; " \
197 "setenv devnum 0; " \
198 "setenv rootdev sda${rfspart}; " \
199 "run tryboot; " \
200 \
201 "setenv dev mmc; " \
202 "setenv rootdev mmcblk0p${rfspart}; " \
203 \
204 "setenv devnum ${sddev}; " \
205 "if mmc dev ${devnum}; then " \
206 "run tryboot; " \
207 "fi; " \
208 \
209 "setenv devnum ${emmcdev}; " \
210 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
211 "if mmc dev ${devnum}; then " \
212 "run tryboot; " \
213 "fi; " \
214 \
215 "bmode usb; " \
216
217#define CONFIG_ARP_TIMEOUT 200UL
218
219/* Miscellaneous configurable options */
220#define CONFIG_SYS_LONGHELP
221#define CONFIG_AUTO_COMPLETE
222
223/* Print Buffer Size */
224#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
225#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
226
227#define CONFIG_SYS_MEMTEST_START 0x10000000
228#define CONFIG_SYS_MEMTEST_END 0x10010000
229#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
230
231#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
232
233#define CONFIG_CMDLINE_EDITING
234#define CONFIG_STACKSIZE (128 * 1024)
235
236/* Physical Memory Map */
237#define CONFIG_NR_DRAM_BANKS 1
238#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
239
240#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
241#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
242#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
243
244#define CONFIG_SYS_INIT_SP_OFFSET \
245 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
246#define CONFIG_SYS_INIT_SP_ADDR \
247 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
248
249/* FLASH and environment organization */
250#define CONFIG_SYS_NO_FLASH
251
252#define CONFIG_ENV_IS_IN_SPI_FLASH
253#define CONFIG_ENV_SIZE (8 * 1024)
254#define CONFIG_ENV_OFFSET (768 * 1024)
255#define CONFIG_ENV_SECT_SIZE (64 * 1024)
256#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
257#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
258#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
259#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
260
261#ifndef CONFIG_SYS_DCACHE_OFF
262#endif
263
264#define CONFIG_SYS_FSL_USDHC_NUM 3
265
266/* Framebuffer */
Akshay Bhat9301aea2016-07-29 11:44:46 -0400267#define CONFIG_VIDEO_IPUV3
Akshay Bhat9301aea2016-07-29 11:44:46 -0400268#define CONFIG_VIDEO_BMP_RLE8
269#define CONFIG_SPLASH_SCREEN
270#define CONFIG_SPLASH_SCREEN_ALIGN
271#define CONFIG_BMP_16BPP
272#define CONFIG_VIDEO_LOGO
273#define CONFIG_VIDEO_BMP_LOGO
274#define CONFIG_IPUV3_CLK 260000000
275#define CONFIG_IMX_HDMI
276#define CONFIG_IMX_VIDEO_SKIP
277
278#define CONFIG_PWM_IMX
279#define CONFIG_IMX6_PWM_PER_CLK 66000000
280
281#undef CONFIG_CMD_PCI
282#ifdef CONFIG_CMD_PCI
Akshay Bhat9301aea2016-07-29 11:44:46 -0400283#define CONFIG_PCI_SCAN_SHOW
284#define CONFIG_PCIE_IMX
285#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
286#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
287#endif
288
289/* I2C Configs */
290#define CONFIG_SYS_I2C
291#define CONFIG_SYS_I2C_MXC
292#define CONFIG_SYS_I2C_SPEED 100000
293#define CONFIG_SYS_I2C_MXC_I2C1
294#define CONFIG_SYS_I2C_MXC_I2C2
295#define CONFIG_SYS_I2C_MXC_I2C3
296
297#endif /* __ADVANTECH_DMSBA16_CONFIG_H */