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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen36cb27c2017-12-26 13:55:53 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen36cb27c2017-12-26 13:55:53 +08005 */
6
Rick Chen36cb27c2017-12-26 13:55:53 +08007#include <common.h>
Simon Glass8e201882020-05-10 11:39:54 -06008#include <flash.h>
Simon Glass2dc9c342020-05-10 11:40:01 -06009#include <image.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070010#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060011#include <net.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080012#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
13#include <netdev.h>
14#endif
Simon Glass3ba929a2020-10-30 21:38:53 -060015#include <asm/global_data.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080016#include <linux/io.h>
Rick Chencea16d02018-05-29 11:07:53 +080017#include <faraday/ftsmc020.h>
18#include <fdtdec.h>
Rick Chen9e017162019-08-28 18:46:07 +080019#include <dm.h>
Rick Chenc3027d02019-11-14 13:52:22 +080020#include <spl.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080021
22DECLARE_GLOBAL_DATA_PTR;
23
Rick Chen2a218152018-12-03 17:48:20 +080024extern phys_addr_t prior_stage_fdt_address;
Rick Chen36cb27c2017-12-26 13:55:53 +080025/*
26 * Miscellaneous platform dependent initializations
27 */
28
29int board_init(void)
30{
Rick Chen36cb27c2017-12-26 13:55:53 +080031 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
32
33 return 0;
34}
35
36int dram_init(void)
37{
Rick Chen92038262019-11-14 13:52:23 +080038 return fdtdec_setup_mem_size_base();
Rick Chen36cb27c2017-12-26 13:55:53 +080039}
40
41int dram_init_banksize(void)
42{
Rick Chen92038262019-11-14 13:52:23 +080043 return fdtdec_setup_memory_banksize();
Rick Chen36cb27c2017-12-26 13:55:53 +080044}
45
46#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090047int board_eth_init(struct bd_info *bd)
Rick Chen36cb27c2017-12-26 13:55:53 +080048{
49 return ftmac100_initialize(bd);
50}
51#endif
52
53ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
54{
55 return 0;
56}
Rick Chen40a6fe72018-03-29 10:08:33 +080057
58void *board_fdt_blob_setup(void)
59{
Rick Chen40a6fe72018-03-29 10:08:33 +080060 return (void *)CONFIG_SYS_FDT_BASE;
61}
Rick Chencea16d02018-05-29 11:07:53 +080062
63int smc_init(void)
64{
65 int node = -1;
66 const char *compat = "andestech,atfsmc020";
67 void *blob = (void *)gd->fdt_blob;
68 fdt_addr_t addr;
69 struct ftsmc020_bank *regs;
70
71 node = fdt_node_offset_by_compatible(blob, -1, compat);
72 if (node < 0)
73 return -FDT_ERR_NOTFOUND;
74
Rick Chenca3e5e42020-07-17 16:24:44 +080075 addr = fdtdec_get_addr_size_auto_noparent(blob, node,
76 "reg", 0, NULL, false);
Rick Chencea16d02018-05-29 11:07:53 +080077
78 if (addr == FDT_ADDR_T_NONE)
79 return -EINVAL;
80
Bin Meng65d59952021-01-31 20:36:01 +080081 regs = (struct ftsmc020_bank *)(uintptr_t)addr;
Rick Chencea16d02018-05-29 11:07:53 +080082 regs->cr &= ~FTSMC020_BANK_WPROT;
83
84 return 0;
85}
86
Rick Chen9e017162019-08-28 18:46:07 +080087static void v5l2_init(void)
88{
89 struct udevice *dev;
90
91 uclass_get_device(UCLASS_CACHE, 0, &dev);
92}
93
Rick Chencea16d02018-05-29 11:07:53 +080094#ifdef CONFIG_BOARD_EARLY_INIT_F
95int board_early_init_f(void)
96{
97 smc_init();
Rick Chen9e017162019-08-28 18:46:07 +080098 v5l2_init();
Rick Chencea16d02018-05-29 11:07:53 +080099
100 return 0;
101}
102#endif
Rick Chenc3027d02019-11-14 13:52:22 +0800103
104#ifdef CONFIG_SPL
105void board_boot_order(u32 *spl_boot_list)
106{
107 u8 i;
108 u32 boot_devices[] = {
109#ifdef CONFIG_SPL_RAM_SUPPORT
110 BOOT_DEVICE_RAM,
111#endif
112#ifdef CONFIG_SPL_MMC_SUPPORT
113 BOOT_DEVICE_MMC1,
114#endif
115 };
116
117 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
118 spl_boot_list[i] = boot_devices[i];
119}
120#endif
121
122#ifdef CONFIG_SPL_LOAD_FIT
123int board_fit_config_name_match(const char *name)
124{
125 /* boot using first FIT config */
126 return 0;
127}
128#endif