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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Benard2e66f3b2014-04-04 19:05:55 +02002/*
3 * Copyright (C) 2014 Eukréa Electromatique
4 * Author: Eric Bénard <eric@eukrea.com>
5 *
6 * Configuration settings for the Embest RIoTboard
7 *
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
Eric Benard2e66f3b2014-04-04 19:05:55 +020010 */
11
12#ifndef __RIOTBOARD_CONFIG_H
13#define __RIOTBOARD_CONFIG_H
14
Eric Benard2e66f3b2014-04-04 19:05:55 +020015#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc1"
Eric Benard2e66f3b2014-04-04 19:05:55 +020017
18#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
19
Adrian Alonsoce08c362015-09-02 13:54:13 -050020#define CONFIG_IMX_THERMAL
Eric Benard2e66f3b2014-04-04 19:05:55 +020021
22/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
24
Eric Benard2e66f3b2014-04-04 19:05:55 +020025#define CONFIG_MXC_UART
26
Eric Benard2e66f3b2014-04-04 19:05:55 +020027/* I2C Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020028#define CONFIG_SYS_I2C
29#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020030#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
31#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070032#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard2e66f3b2014-04-04 19:05:55 +020033#define CONFIG_SYS_I2C_SPEED 100000
34
35/* USB Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020036#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
37#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
38#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
39#define CONFIG_MXC_USB_FLAGS 0
40
41/* MMC Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020042#define CONFIG_SYS_FSL_ESDHC_ADDR 0
43
Eric Benard2e66f3b2014-04-04 19:05:55 +020044#define CONFIG_FEC_MXC
Eric Benard2e66f3b2014-04-04 19:05:55 +020045#define IMX_FEC_BASE ENET_BASE_ADDR
46#define CONFIG_FEC_XCV_TYPE RGMII
47#define CONFIG_ETHPRIME "FEC"
48#define CONFIG_FEC_MXC_PHYADDR 4
49
Eric Benard2e66f3b2014-04-04 19:05:55 +020050#define CONFIG_PHY_ATHEROS
51
Eric Benard2e66f3b2014-04-04 19:05:55 +020052#define CONFIG_ARP_TIMEOUT 200UL
53
Eric Benard2e66f3b2014-04-04 19:05:55 +020054#define CONFIG_SYS_MEMTEST_START 0x10000000
55#define CONFIG_SYS_MEMTEST_END 0x10010000
56#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
57
Eric Benard2e66f3b2014-04-04 19:05:55 +020058/* Physical Memory Map */
Eric Benard2e66f3b2014-04-04 19:05:55 +020059#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
60
61#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
62#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
63#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
64
65#define CONFIG_SYS_INIT_SP_OFFSET \
66 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
67#define CONFIG_SYS_INIT_SP_ADDR \
68 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
69
Peter Robinson4b671502015-05-22 17:30:45 +010070/* Environment organization */
Eric Benard2e66f3b2014-04-04 19:05:55 +020071#define CONFIG_ENV_SIZE (8 * 1024)
72
73#if defined(CONFIG_ENV_IS_IN_MMC)
74/* RiOTboard */
Iain Patone90c9ab2014-12-14 14:51:46 +000075#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020076#define CONFIG_SYS_FSL_USDHC_NUM 3
77#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
78#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
79#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
80#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
81/* MarSBoard */
Iain Patone90c9ab2014-12-14 14:51:46 +000082#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020083#define CONFIG_SYS_FSL_USDHC_NUM 2
84#define CONFIG_ENV_OFFSET (768 * 1024)
85#define CONFIG_ENV_SECT_SIZE (8 * 1024)
Eric Benard2e66f3b2014-04-04 19:05:55 +020086#endif
87
Eric Benard2e66f3b2014-04-04 19:05:55 +020088/* Framebuffer */
Eric Benard2e66f3b2014-04-04 19:05:55 +020089#define CONFIG_VIDEO_IPUV3
Eric Benard2e66f3b2014-04-04 19:05:55 +020090#define CONFIG_VIDEO_BMP_RLE8
91#define CONFIG_SPLASH_SCREEN
92#define CONFIG_SPLASH_SCREEN_ALIGN
93#define CONFIG_BMP_16BPP
94#define CONFIG_VIDEO_LOGO
95#define CONFIG_VIDEO_BMP_LOGO
Eric Benard2e66f3b2014-04-04 19:05:55 +020096#define CONFIG_IMX_HDMI
97#define CONFIG_IMX_VIDEO_SKIP
98
Peter Robinsonbe6c5f12015-05-22 17:30:52 +010099#include "mx6_common.h"
Iain Paton2e891152014-12-14 14:51:32 +0000100
Fabien Lahouderea47a6a12018-11-08 11:28:05 +0100101#ifdef CONFIG_SPL
102#include "imx6_spl.h"
103/* RiOTboard */
104#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
105#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
106#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
107
108#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
109#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
110#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
111
112#endif
113
Iain Patone90c9ab2014-12-14 14:51:46 +0000114/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
115 * 1M script, 1M pxe and the ramdisk at the end */
116#define MEM_LAYOUT_ENV_SETTINGS \
117 "bootm_size=0x10000000\0" \
118 "kernel_addr_r=0x12000000\0" \
119 "fdt_addr_r=0x13000000\0" \
120 "scriptaddr=0x13100000\0" \
121 "pxefile_addr_r=0x13200000\0" \
122 "ramdisk_addr_r=0x13300000\0"
123
124#define BOOT_TARGET_DEVICES(func) \
125 func(MMC, mmc, 0) \
126 func(MMC, mmc, 1) \
127 func(MMC, mmc, 2) \
128 func(USB, usb, 0) \
129 func(PXE, pxe, na) \
130 func(DHCP, dhcp, na)
131
132#include <config_distro_bootcmd.h>
133
134#define CONSOLE_STDIN_SETTINGS \
135 "stdin=serial\0"
136
137#define CONSOLE_STDOUT_SETTINGS \
138 "stdout=serial\0" \
139 "stderr=serial\0"
140
141#define CONSOLE_ENV_SETTINGS \
142 CONSOLE_STDIN_SETTINGS \
143 CONSOLE_STDOUT_SETTINGS
144
145#define CONFIG_EXTRA_ENV_SETTINGS \
146 CONSOLE_ENV_SETTINGS \
147 MEM_LAYOUT_ENV_SETTINGS \
148 "fdtfile=" CONFIG_FDTFILE "\0" \
Fabio Bertoncd681b22017-07-10 17:04:11 -0300149 "finduuid=part uuid mmc 0:1 uuid\0" \
Iain Patone90c9ab2014-12-14 14:51:46 +0000150 BOOTENV
151
Eric Benard2e66f3b2014-04-04 19:05:55 +0200152#endif /* __RIOTBOARD_CONFIG_H */