blob: aa8eaa0ea13aa43ffae26de17df5357efc354998 [file] [log] [blame]
Marcel Ziswiler99d768b2019-05-31 18:56:39 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Toradex
4 */
5
6#include <common.h>
7
8#include <asm/arch/clock.h>
9#include <asm/arch/imx8-pins.h>
10#include <asm/arch/iomux.h>
11#include <asm/arch/sci/sci.h>
12#include <asm/arch/sys_proto.h>
13#include <asm/gpio.h>
14#include <asm/io.h>
15#include <environment.h>
16#include <errno.h>
17#include <linux/libfdt.h>
18
19#include "../common/tdx-cfg-block.h"
20
21DECLARE_GLOBAL_DATA_PTR;
22
23#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
24 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
25 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
26 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
27
28static iomux_cfg_t uart3_pads[] = {
29 SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
30 SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
31 /* Transceiver FORCEOFF# signal, mux to use pull-up */
32 SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
33};
34
35static void setup_iomux_uart(void)
36{
37 imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
38}
39
40int board_early_init_f(void)
41{
42 sc_pm_clock_rate_t rate;
43 sc_err_t err = 0;
44
45 /*
46 * This works around that having only UART3 up the baudrate is 1.2M
47 * instead of 115.2k. Set UART0 clock root to 80 MHz
48 */
49 rate = 80000000;
50 err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
51 if (err != SC_ERR_NONE)
52 return 0;
53
54 /* Power up UART3 */
55 err = sc_pm_set_resource_power_mode(-1, SC_R_UART_3, SC_PM_PW_MODE_ON);
56 if (err != SC_ERR_NONE)
57 return 0;
58
59 /* Set UART3 clock root to 80 MHz */
60 rate = 80000000;
61 err = sc_pm_set_clock_rate(-1, SC_R_UART_3, SC_PM_CLK_PER, &rate);
62 if (err != SC_ERR_NONE)
63 return 0;
64
65 /* Enable UART3 clock root */
66 err = sc_pm_clock_enable(-1, SC_R_UART_3, SC_PM_CLK_PER, true, false);
67 if (err != SC_ERR_NONE)
68 return 0;
69
70 setup_iomux_uart();
71
72 return 0;
73}
74
75#if IS_ENABLED(CONFIG_DM_GPIO)
76static void board_gpio_init(void)
77{
78 /* TODO */
79}
80#else
81static inline void board_gpio_init(void) {}
82#endif
83
84#if IS_ENABLED(CONFIG_FEC_MXC)
85#include <miiphy.h>
86
87int board_phy_config(struct phy_device *phydev)
88{
89 if (phydev->drv->config)
90 phydev->drv->config(phydev);
91
92 return 0;
93}
94#endif
95
96void build_info(void)
97{
98 u32 sc_build = 0, sc_commit = 0;
99
100 /* Get SCFW build and commit id */
101 sc_misc_build_info(-1, &sc_build, &sc_commit);
102 if (!sc_build) {
103 printf("SCFW does not support build info\n");
104 sc_commit = 0; /* Display 0 if build info not supported */
105 }
106 printf("Build: SCFW %x\n", sc_commit);
107}
108
109int checkboard(void)
110{
111 puts("Model: Toradex Colibri iMX8X\n");
112
113 build_info();
114 print_bootinfo();
115
116 return 0;
117}
118
119int board_init(void)
120{
121 board_gpio_init();
122
123 return 0;
124}
125
126void detail_board_ddr_info(void)
127{
128 puts("\nDDR ");
129}
130
131/*
132 * Board specific reset that is system reset.
133 */
134void reset_cpu(ulong addr)
135{
136 /* TODO */
137}
138
139#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
140int ft_board_setup(void *blob, bd_t *bd)
141{
142 return ft_common_board_setup(blob, bd);
143}
144#endif
145
146int board_mmc_get_env_dev(int devno)
147{
148 return devno;
149}
150
151int board_late_init(void)
152{
153#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
154/* TODO move to common */
155 env_set("board_name", "Colibri iMX8QXP");
156 env_set("board_rev", "v1.0");
157#endif
158
159 return 0;
160}