blob: 48e93ab0d03a3e944c9e2d1e9e80209d0d6ae675 [file] [log] [blame]
Marek Vasut1e847582010-03-07 23:35:48 +01001/*
2 * (C) Copyright 2004
3 * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
4 *
5 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <asm/arch/hardware.h>
33
34DECLARE_GLOBAL_DATA_PTR;
35
36/* ------------------------------------------------------------------------- */
37
38/*
39 * Miscelaneous platform dependent initialisations
40 */
41extern struct serial_device serial_ffuart_device;
42extern struct serial_device serial_btuart_device;
43extern struct serial_device serial_stuart_device;
44
45struct serial_device *default_serial_console (void)
46{
47 return &serial_ffuart_device;
48}
49
50int board_init (void)
51{
52 /* memory and cpu-speed are setup before relocation */
53 /* so we do _nothing_ here */
54
55 /* arch number of vpac270 */
56 gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
57
58 /* adress of boot parameters */
59 gd->bd->bi_boot_params = 0xa0000100;
60
61 return 0;
62}
63
64int dram_init (void)
65{
66 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
67 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
68
69 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
70 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
71
72 return 0;
73}
74
75int usb_board_init(void)
76{
77 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
78 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
79
80 UHCHR |= UHCHR_FSBIR;
81
82 while (UHCHR & UHCHR_FSBIR);
83
84 UHCHR &= ~UHCHR_SSE;
85 UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
86
87 /* Clear any OTG Pin Hold */
88 if (PSSR & PSSR_OTGPH)
89 PSSR |= PSSR_OTGPH;
90
91 UHCRHDA &= ~(0x200);
92 UHCRHDA |= 0x100;
93
94 /* Set port power control mask bits, only 3 ports. */
95 UHCRHDB |= (0x7<<17);
96
97 /* enable port 2 */
98 UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
99
100 return 0;
101}
102
103void usb_board_init_fail(void)
104{
105 return;
106}
107
108void usb_board_stop(void)
109{
110 UHCHR |= UHCHR_FHR;
111 udelay(11);
112 UHCHR &= ~UHCHR_FHR;
113
114 UHCCOMS |= 1;
115 udelay(10);
116
117 CKEN &= ~CKEN10_USBHOST;
118
119 return;
120}
121
122#ifdef CONFIG_DRIVER_DM9000
123int board_eth_init(bd_t *bis)
124{
125 return dm9000_initialize(bis);
126}
127#endif