| Masahiro Yamada | 1fe65d3 | 2015-09-22 00:27:41 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <spl.h> |
| 9 | #include <linux/io.h> |
| Masahiro Yamada | efdf340 | 2016-01-09 01:51:13 +0900 | [diff] [blame] | 10 | |
| 11 | #include "../sg-regs.h" |
| 12 | #include "boot-device.h" |
| Masahiro Yamada | 1fe65d3 | 2015-09-22 00:27:41 +0900 | [diff] [blame] | 13 | |
| 14 | static struct boot_device_info boot_device_table[] = { |
| 15 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, |
| 16 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, |
| 17 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, |
| 18 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, |
| 19 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, |
| 20 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, |
| 21 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, |
| 22 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, |
| 23 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, |
| 24 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, |
| 25 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, |
| 26 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, |
| 27 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, |
| 28 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, |
| 29 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, |
| 30 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, |
| 31 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, |
| 32 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, |
| 33 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, |
| 34 | {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, |
| 35 | {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, |
| 36 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, |
| 37 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, |
| 38 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, |
| 39 | {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, |
| 40 | {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, |
| 41 | {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, |
| 42 | {BOOT_DEVICE_SPI, "SPI 3Byte CS1"}, |
| 43 | {BOOT_DEVICE_SPI, "SPI 4Byte CS1"}, |
| 44 | {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, |
| 45 | {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, |
| 46 | {BOOT_DEVICE_NONE, "Reserved"}, |
| 47 | }; |
| 48 | |
| 49 | int get_boot_mode_sel(void) |
| 50 | { |
| 51 | return (readl(SG_PINMON0) >> 1) & 0x1f; |
| 52 | } |
| 53 | |
| 54 | u32 proxstream2_boot_device(void) |
| 55 | { |
| 56 | int boot_mode; |
| 57 | |
| 58 | boot_mode = get_boot_mode_sel(); |
| 59 | |
| 60 | return boot_device_table[boot_mode].type; |
| 61 | } |
| 62 | |
| 63 | void proxstream2_boot_mode_show(void) |
| 64 | { |
| 65 | int mode_sel, i; |
| 66 | |
| 67 | mode_sel = get_boot_mode_sel(); |
| 68 | |
| 69 | puts("Boot Mode Pin:\n"); |
| 70 | |
| 71 | for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) |
| 72 | printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, |
| 73 | boot_device_table[i].info); |
| 74 | } |