blob: 1e527c0485e2e7d35f8b8468684802bffc75f8e4 [file] [log] [blame]
developerb73d7952020-01-10 16:30:26 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 MediaTek Inc.
4 * Author: Sam Shih <sam.shih@mediatek.com>
5 */
6
7#include <common.h>
8#include <fdtdec.h>
9#include <asm/armv8/mmu.h>
10
11int print_cpuinfo(void)
12{
13 printf("CPU: MediaTek MT7622\n");
14 return 0;
15}
16
17int dram_init(void)
18{
19 int ret;
20
21 ret = fdtdec_setup_memory_banksize();
22 if (ret)
23 return ret;
24 return fdtdec_setup_mem_size_base();
25
26}
27
28void reset_cpu(ulong addr)
29{
30 psci_system_reset();
31}
32
33static struct mm_region mt7622_mem_map[] = {
34 {
35 /* DDR */
36 .virt = 0x40000000UL,
37 .phys = 0x40000000UL,
38 .size = 0x40000000UL,
39 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
40 }, {
41 .virt = 0x00000000UL,
42 .phys = 0x00000000UL,
43 .size = 0x40000000UL,
44 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
45 PTE_BLOCK_NON_SHARE |
46 PTE_BLOCK_PXN | PTE_BLOCK_UXN
47 }, {
48 0,
49 }
50};
51struct mm_region *mem_map = mt7622_mem_map;