blob: e3c146e8244d2966d74bb244dbb22e98e6e9a5bc [file] [log] [blame]
Marek Vasutb700f032019-07-29 19:59:44 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * include/configs/condor.h
4 * This file is Condor board configuration.
5 *
6 * Copyright (C) 2019 Renesas Electronics Corporation
7 */
8
9#ifndef __CONDOR_H
10#define __CONDOR_H
11
12#include "rcar-gen3-common.h"
13
14/* Ethernet RAVB */
15#define CONFIG_BITBANGMII
16#define CONFIG_BITBANGMII_MULTI
17
18/* Environment compatibility */
19#undef CONFIG_ENV_SIZE_REDUND
20#undef CONFIG_ENV_SECT_SIZE
21#define CONFIG_ENV_SECT_SIZE (256 * 1024)
22#define CONFIG_ENV_OFFSET 0x700000
23
24/* SH Ether */
25#define CONFIG_SH_ETHER_USE_PORT 0
26#define CONFIG_SH_ETHER_PHY_ADDR 0x1
27#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
28#define CONFIG_SH_ETHER_CACHE_WRITEBACK
29#define CONFIG_SH_ETHER_CACHE_INVALIDATE
30#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
31#define CONFIG_BITBANGMII
32#define CONFIG_BITBANGMII_MULTI
33
34/* Board Clock */
35/* XTAL_CLK : 33.33MHz */
36#define CONFIG_SYS_CLK_FREQ 33333333u
37
38/* Generic Timer Definitions (use in assembler source) */
39#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
40
41#endif /* __CONDOR_H */