blob: 3a374d88718397d6395113a8cb51d6ee0e2cf82e [file] [log] [blame]
Alex89e50d92017-02-06 19:17:34 -08001source "drivers/net/phy/Kconfig"
Calvin Johnson0e6101a2018-03-08 15:30:35 +05302source "drivers/net/pfe_eth/Kconfig"
Alex89e50d92017-02-06 19:17:34 -08003
Joe Hershbergerc7eceaf2015-03-22 17:09:10 -05004config DM_ETH
5 bool "Enable Driver Model for Ethernet drivers"
6 depends on DM
7 help
8 Enable driver model for Ethernet.
9
10 The eth_*() interface will be implemented by the UC_ETH class
11 This is currently implemented in net/eth.c
12 Look in include/net.h for details.
Joe Hershberger6ab76992015-03-22 17:09:13 -050013
Alex Kiernanf1531ad2018-04-01 09:22:34 +000014config DRIVER_TI_CPSW
15 bool "TI Common Platform Ethernet Switch"
16 select PHYLIB
17 help
18 This driver supports the TI three port switch gigabit ethernet
19 subsystem found in the TI SoCs.
20
Joe Hershberger6ab76992015-03-22 17:09:13 -050021menuconfig NETDEVICES
22 bool "Network device support"
23 depends on NET
Joe Hershberger5a9d7f12015-06-22 16:15:30 -050024 default y if DM_ETH
Joe Hershberger6ab76992015-03-22 17:09:13 -050025 help
26 You must select Y to enable any network device support
27 Generally if you have any networking support this is a given
28
29 If unsure, say Y
30
31if NETDEVICES
32
Philipp Tomsich00c33612017-03-26 18:50:23 +020033config PHY_GIGE
34 bool "Enable GbE PHY status parsing and configuration"
35 help
36 Enables support for parsing the status output and for
37 configuring GbE PHYs (affects the inner workings of some
38 commands and miiphyutil.c).
39
Marek Vasut0a3d0e12016-05-24 23:29:09 +020040config AG7XXX
41 bool "Atheros AG7xxx Ethernet MAC support"
42 depends on DM_ETH && ARCH_ATH79
43 select PHYLIB
44 help
45 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
46 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
47
48
Thomas Chouec06dd82015-10-22 15:29:11 +080049config ALTERA_TSE
50 bool "Altera Triple-Speed Ethernet MAC support"
51 depends on DM_ETH
52 select PHYLIB
53 help
54 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
55 Please find details on the "Triple-Speed Ethernet MegaCore Function
56 Resource Center" of Altera.
57
Suji Velupillaid2f677a2017-07-10 14:05:41 -070058config BCM_SF2_ETH
59 bool "Broadcom SF2 (Starfighter2) Ethernet support"
60 select PHYLIB
61 help
62 This is an abstract framework which provides a generic interface
63 to MAC and DMA management for multiple Broadcom SoCs such as
64 Cygnus, NSP and bcm28155_ap platforms.
65
66config BCM_SF2_ETH_DEFAULT_PORT
67 int "Broadcom SF2 (Starfighter2) Ethernet default port number"
68 depends on BCM_SF2_ETH
69 default 0
70 help
71 Default port number for the Starfighter2 ethernet driver.
72
73config BCM_SF2_ETH_GMAC
74 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
75 depends on BCM_SF2_ETH
76 help
77 This flag enables the ethernet support for Broadcom platforms with
78 GMAC such as Cygnus. This driver is based on the framework provided
79 by the BCM_SF2_ETH driver.
80 Say Y to any bcmcygnus based platforms.
81
Stephen Warren50709602016-10-21 14:46:47 -060082config DWC_ETH_QOS
83 bool "Synopsys DWC Ethernet QOS device support"
84 depends on DM_ETH
85 select PHYLIB
86 help
87 This driver supports the Synopsys Designware Ethernet QOS (Quality
88 Of Service) IP block. The IP supports many options for bus type,
89 clocking/reset structure, and feature list. This driver currently
90 supports the specific configuration used in NVIDIA's Tegra186 chip,
91 but should be extensible to other combinations quite easily.
92
Simon Glassa83ccd52015-08-19 09:33:41 -060093config E1000
94 bool "Intel PRO/1000 Gigabit Ethernet support"
95 help
96 This driver supports Intel(R) PRO/1000 gigabit ethernet family of
97 adapters. For more information on how to identify your adapter, go
98 to the Adapter & Driver ID Guide at:
99
100 <http://support.intel.com/support/network/adapter/pro100/21397.htm>
101
102config E1000_SPI_GENERIC
103 bool "Allow access to the Intel 8257x SPI bus"
104 depends on E1000
105 help
106 Allow generic access to the SPI bus on the Intel 8257x, for
107 example with the "sspi" command.
108
109config E1000_SPI
110 bool "Enable SPI bus utility code"
111 depends on E1000
112 help
113 Utility code for direct access to the SPI bus on Intel 8257x.
114 This does not do anything useful unless you set at least one
115 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
116
117config CMD_E1000
118 bool "Enable the e1000 command"
119 depends on E1000
120 help
121 This enables the 'e1000' management command for E1000 devices. When
122 used on devices with SPI support you can reprogram the EEPROM from
123 U-Boot.
124
Joe Hershberger6ab76992015-03-22 17:09:13 -0500125config ETH_SANDBOX
126 depends on DM_ETH && SANDBOX
127 default y
128 bool "Sandbox: Mocked Ethernet driver"
129 help
130 This driver simply responds with fake ARP replies and ping
131 replies that are used to verify network stack functionality
132
133 This driver is particularly useful in the test/dm/eth.c tests
134
Joe Hershberger586cbd12015-03-22 17:09:21 -0500135config ETH_SANDBOX_RAW
136 depends on DM_ETH && SANDBOX
137 default y
138 bool "Sandbox: Bridge to Linux Raw Sockets"
139 help
140 This driver is a bridge from the bottom of the network stack
141 in U-Boot to the RAW AF_PACKET API in Linux. This allows real
142 network traffic to be tested from within sandbox. See
143 board/sandbox/README.sandbox for more details.
144
Simon Glass6e378742015-04-05 16:07:34 -0600145config ETH_DESIGNWARE
146 bool "Synopsys Designware Ethernet MAC"
Thomas Chou7a0dfa62015-12-07 20:53:29 +0800147 select PHYLIB
Simon Glass6e378742015-04-05 16:07:34 -0600148 help
149 This MAC is present in SoCs from various vendors. It supports
150 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
151 provide the PHY (physical media interface).
152
Max Filippove07d3d22016-08-05 18:26:15 +0300153config ETHOC
154 bool "OpenCores 10/100 Mbps Ethernet MAC"
155 help
156 This MAC is present in OpenRISC and Xtensa XTFPGA boards.
157
Peng Fana65e0362018-03-28 20:54:14 +0800158config FEC_MXC_SHARE_MDIO
159 bool "Share the MDIO bus for FEC controller"
160 depends on FEC_MXC
161
162config FEC_MXC_MDIO_BASE
163 hex "MDIO base address for the FEC controller"
164 depends on FEC_MXC_SHARE_MDIO
165 help
166 This specifies the MDIO registers base address. It is used when
167 two FEC controllers share MDIO bus.
168
Jagan Tekia48af852016-10-08 18:00:12 +0530169config FEC_MXC
170 bool "FEC Ethernet controller"
Peng Fana65e0362018-03-28 20:54:14 +0800171 depends on MX5 || MX6 || MX7
Jagan Tekia48af852016-10-08 18:00:12 +0530172 help
173 This driver supports the 10/100 Fast Ethernet controller for
174 NXP i.MX processors.
175
Tom Rinic5ea8ed2017-05-26 11:18:53 -0400176config FTMAC100
177 bool "Ftmac100 Ethernet Support"
178 help
179 This MAC is present in Andestech SoCs.
180
Chris Packham919041c2017-08-21 20:17:03 +1200181config MVNETA
Miquel Raynal59d42cd2017-12-28 15:43:09 +0100182 bool "Marvell Armada XP/385/3700 network interface support"
183 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700
Chris Packham919041c2017-08-21 20:17:03 +1200184 select PHYLIB
185 help
186 This driver supports the network interface units in the
Miquel Raynal59d42cd2017-12-28 15:43:09 +0100187 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
Chris Packham919041c2017-08-21 20:17:03 +1200188
Stefan Roese96c19042016-02-10 07:22:10 +0100189config MVPP2
Stefan Roese78a112b2017-02-15 11:42:59 +0100190 bool "Marvell Armada 375/7K/8K network interface support"
191 depends on ARMADA_375 || ARMADA_8K
Stefan Roese96c19042016-02-10 07:22:10 +0100192 select PHYLIB
193 help
194 This driver supports the network interface units in the
Stefan Roese78a112b2017-02-15 11:42:59 +0100195 Marvell ARMADA 375, 7K and 8K SoCs.
Stefan Roese96c19042016-02-10 07:22:10 +0100196
Wenyou Yange7183de2016-11-02 10:06:55 +0800197config MACB
198 bool "Cadence MACB/GEM Ethernet Interface"
199 depends on DM_ETH
200 select PHYLIB
201 help
202 The Cadence MACB ethernet interface is found on many Atmel
203 AT91 and SAMA5 parts. This driver also supports the Cadence
204 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
205 Say Y to include support for the MACB/GEM chip.
206
Wilson Lee41d6d1e2017-08-22 20:25:07 -0700207config MACB_ZYNQ
208 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
209 depends on MACB
210 help
211 The Cadence MACB ethernet interface was used on Zynq platform.
212 Say Y to enable support for the MACB/GEM in Zynq chip.
213
Bin Meng64d3dca2015-08-27 22:25:58 -0700214config PCH_GBE
215 bool "Intel Platform Controller Hub EG20T GMAC driver"
216 depends on DM_ETH && DM_PCI
217 select PHYLIB
218 help
219 This MAC is present in Intel Platform Controller Hub EG20T. It
220 supports 10/100/1000 Mbps operation.
221
Mylène Josserande44eb3a2017-04-02 12:59:08 +0200222config RGMII
223 bool "Enable RGMII"
224 help
225 Enable the support of the Reduced Gigabit Media-Independent
226 Interface (RGMII).
227
Bin Menga6448df2016-03-21 06:47:41 -0700228config RTL8139
229 bool "Realtek 8139 series Ethernet controller driver"
230 help
231 This driver supports Realtek 8139 series fast ethernet family of
232 PCI chipsets/adapters.
233
Bin Meng29971222016-03-21 06:47:42 -0700234config RTL8169
235 bool "Realtek 8169 series Ethernet controller driver"
236 help
237 This driver supports Realtek 8169 series gigabit ethernet family of
238 PCI/PCIe chipsets/adapters.
239
Adam Ford0a044f82017-09-05 15:20:44 -0500240config SMC911X
241 bool "SMSC LAN911x and LAN921x controller driver"
242
243if SMC911X
244
245config SMC911X_BASE
246 hex "SMC911X Base Address"
247 help
248 Define this to hold the physical address
249 of the device (I/O space)
250
251choice
252 prompt "SMC911X bus width"
253 default SMC911X_16_BIT
254
255config SMC911X_32_BIT
256 bool "Enable 32-bit interface"
257
258config SMC911X_16_BIT
259 bool "Enable 16-bit interface"
260 help
261 Define this if data bus is 16 bits. If your processor
262 automatically converts one 32 bit word to two 16 bit
263 words you may also try CONFIG_SMC911X_32_BIT.
264
265endchoice
266endif #SMC911X
267
Mylène Josserandc1506ef2017-04-02 12:59:03 +0200268config SUN7I_GMAC
269 bool "Enable Allwinner GMAC Ethernet support"
270 help
271 Enable the support for Sun7i GMAC Ethernet controller
272
Stefan Mavrodieveaee8582017-11-03 08:56:51 +0200273config SUN7I_GMAC_FORCE_TXERR
274 bool "Force PA17 as gmac function"
275 depends on SUN7I_GMAC
276 help
277 Some ethernet phys needs TXERR control. Since the GMAC
278 doesn't have such signal, setting PA17 as GMAC function
279 makes the pin output low, which enables data transmission.
280
Mylène Josserand43ef1842017-04-02 12:59:07 +0200281config SUN4I_EMAC
282 bool "Allwinner Sun4i Ethernet MAC support"
283 depends on DM_ETH
Artturi Alm8ed09172017-11-08 05:08:58 +0200284 select PHYLIB
Mylène Josserand43ef1842017-04-02 12:59:07 +0200285 help
286 This driver supports the Allwinner based SUN4I Ethernet MAC.
287
Amit Singh Tomard194c0e2016-07-06 17:59:44 +0530288config SUN8I_EMAC
289 bool "Allwinner Sun8i Ethernet MAC support"
290 depends on DM_ETH
291 select PHYLIB
Philipp Tomsich00c33612017-03-26 18:50:23 +0200292 select PHY_GIGE
Amit Singh Tomard194c0e2016-07-06 17:59:44 +0530293 help
294 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC.
295 It can be found in H3/A64/A83T based SoCs and compatible with both
Tom Rini1eee1172017-02-20 09:38:03 -0500296 External and Internal PHYs.
Amit Singh Tomard194c0e2016-07-06 17:59:44 +0530297
Nobuhiro Iwamatsuf593ecb2017-12-01 16:08:03 +0900298config SH_ETHER
299 bool "Renesas SH Ethernet MAC"
300 select PHYLIB
301 help
302 This driver supports the Ethernet for Renesas SH and ARM SoCs.
303
Michal Simek07d204f2015-12-09 16:54:42 +0100304config XILINX_AXIEMAC
305 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
306 select PHYLIB
307 select MII
308 bool "Xilinx AXI Ethernet"
309 help
310 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
311
Michal Simekeaee95a2015-12-11 09:41:49 +0100312config XILINX_EMACLITE
Zubair Lutfullah Kakakhelc6811092016-07-27 12:25:09 +0100313 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
Michal Simekeaee95a2015-12-11 09:41:49 +0100314 select PHYLIB
315 select MII
316 bool "Xilinx Ethernetlite"
317 help
318 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
319
Michal Simek3d7285f2015-11-30 14:34:52 +0100320config ZYNQ_GEM
321 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
Michal Simek27ba0902015-12-11 09:14:31 +0100322 select PHYLIB
Michal Simek3d7285f2015-11-30 14:34:52 +0100323 bool "Xilinx Ethernet GEM"
324 help
Michal Simek7fb1d232015-12-09 16:53:52 +0100325 This MAC is present in Xilinx Zynq and ZynqMP SoCs.
Michal Simek3d7285f2015-11-30 14:34:52 +0100326
Purna Chandra Mandal6b731c92016-01-28 15:30:21 +0530327config PIC32_ETH
328 bool "Microchip PIC32 Ethernet Support"
329 depends on DM_ETH && MACH_PIC32
330 select PHYLIB
331 help
332 This driver implements 10/100 Mbps Ethernet and MAC layer for
333 Microchip PIC32 microcontrollers.
334
Sjoerd Simons54c46f92017-01-11 11:46:11 +0100335config GMAC_ROCKCHIP
336 bool "Rockchip Synopsys Designware Ethernet MAC"
337 depends on DM_ETH && ETH_DESIGNWARE
338 help
339 This driver provides Rockchip SoCs network support based on the
340 Synopsys Designware driver.
341
Marek Vasut17714cb2017-05-13 15:54:28 +0200342config RENESAS_RAVB
343 bool "Renesas Ethernet AVB MAC"
344 depends on DM_ETH && RCAR_GEN3
345 select PHYLIB
346 help
347 This driver implements support for the Ethernet AVB block in
348 Renesas M3 and H3 SoCs.
349
Christophe Leroy56ef30a2017-07-06 10:33:23 +0200350config MPC8XX_FEC
351 bool "Fast Ethernet Controller on MPC8XX"
Christophe Leroyb3510fb2018-03-16 17:20:41 +0100352 depends on MPC8xx
Christophe Leroy56ef30a2017-07-06 10:33:23 +0200353 select MII
354 help
355 This driver implements support for the Fast Ethernet Controller
356 on MPC8XX
357
358config ETHER_ON_FEC1
359 bool "FEC1"
360 depends on MPC8XX_FEC
361 default y
362
363config FEC1_PHY
364 int "FEC1 PHY"
365 depends on ETHER_ON_FEC1
366 default -1
367 help
368 Define to the hardcoded PHY address which corresponds
369 to the given FEC; i. e.
370 #define CONFIG_FEC1_PHY 4
371 means that the PHY with address 4 is connected to FEC1
372
373 When set to -1, means to probe for first available.
374
375config PHY_NORXERR
376 bool "PHY_NORXERR"
377 depends on ETHER_ON_FEC1
378 default n
379 help
380 The PHY does not have a RXERR line (RMII only).
381 (so program the FEC to ignore it).
382
383config ETHER_ON_FEC2
384 bool "FEC2"
385 depends on MPC8XX_FEC && MPC885
386 default y
387
388config FEC2_PHY
389 int "FEC2 PHY"
390 depends on ETHER_ON_FEC2
391 default -1
392 help
393 Define to the hardcoded PHY address which corresponds
394 to the given FEC; i. e.
395 #define CONFIG_FEC1_PHY 4
396 means that the PHY with address 4 is connected to FEC1
397
398 When set to -1, means to probe for first available.
399
400config FEC2_PHY_NORXERR
401 bool "PHY_NORXERR"
402 depends on ETHER_ON_FEC2
403 default n
404 help
405 The PHY does not have a RXERR line (RMII only).
406 (so program the FEC to ignore it).
407
Ahmed Mansour816bc412017-12-15 16:01:01 -0500408config SYS_DPAA_QBMAN
409 bool "Device tree fixup for QBMan on freescale SOCs"
410 depends on (ARM || PPC) && !SPL_BUILD
411 default y if ARCH_B4860 || \
412 ARCH_B4420 || \
413 ARCH_P1023 || \
414 ARCH_P2041 || \
415 ARCH_T1023 || \
416 ARCH_T1024 || \
417 ARCH_T1040 || \
418 ARCH_T1042 || \
419 ARCH_T2080 || \
420 ARCH_T2081 || \
421 ARCH_T4240 || \
422 ARCH_T4160 || \
423 ARCH_P4080 || \
424 ARCH_P3041 || \
425 ARCH_P5040 || \
426 ARCH_P5020 || \
427 ARCH_LS1043A || \
428 ARCH_LS1046A
429 help
430 QBman fixups to allow deep sleep in DPAA 1 SOCs
431
Mario Sixda4fc932018-03-28 14:38:18 +0200432config TSEC_ENET
433 select PHYLIB
434 bool "Enable Three-Speed Ethernet Controller"
435 help
436 This driver implements support for the (Enhanced) Three-Speed
437 Ethernet Controller found on Freescale SoCs.
438
Joe Hershberger6ab76992015-03-22 17:09:13 -0500439endif # NETDEVICES