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git01.mediatek.com / filogic / uboot / b5f9aef398bcc65ff4f26e95086f811fbb0fe7f4 / . / include / configs / tqma6_wru4.h
blob: e06fc7fe1559fc0b54d4169b907000b62cd64083 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]2/*
3 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]4 */
5
6#ifndef __CONFIG_TQMA6_WRU4_H
7#define __CONFIG_TQMA6_WRU4_H
8
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]9/* Ethernet */
Tom Rini4e3c8a62022-12-04 10:03:53 -0500[diff] [blame]10#define CFG_FEC_MXC_PHYADDR 0x01
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]11
12/* UART */
Tom Rinia17aa192022-12-04 10:04:55 -0500[diff] [blame]13#define CFG_MXC_UART_BASE UART4_BASE
Simon Glass4694a742016-10-17 20:12:39 -0600[diff] [blame]14#define CONSOLE_DEV "ttymxc3"
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]15
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]16/* Watchdog */
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]17
18/* Config on-board RTC */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]19#define CFG_SYS_RTC_BUS_NUM 2
20#define CFG_SYS_I2C_RTC_ADDR 0x68
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]21/* Turn off RTC square-wave output to save battery */
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]22
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]23/* LED */
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]24
Michael Krummsdorf3072f6e2020-04-09 15:21:40 +0200[diff] [blame]25/* I2C */
Michael Krummsdorf3072f6e2020-04-09 15:21:40 +0200[diff] [blame]26
Stefan Roesebe4cb042015-07-06 13:36:33 +0200[diff] [blame]27#endif /* __CONFIG_TQMA6_WRU4_H */