| Michal Simek | e60148d | 2014-01-14 14:21:52 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014 Xilinx, Inc. Michal Simek |
| 3 | * Copyright (c) 2004-2008 Texas Instruments |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ |
| 12 | LENGTH = CONFIG_SPL_MAX_SIZE } |
| 13 | MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ |
| 14 | LENGTH = CONFIG_SPL_BSS_MAX_SIZE } |
| 15 | |
| 16 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
| 17 | OUTPUT_ARCH(arm) |
| 18 | ENTRY(_start) |
| 19 | SECTIONS |
| 20 | { |
| 21 | . = ALIGN(4); |
| 22 | .text : |
| 23 | { |
| 24 | __image_copy_start = .; |
| Peter Crosthwaite | 8a0e77b | 2014-08-07 22:26:43 +1000 | [diff] [blame] | 25 | *(.vectors) |
| Michal Simek | e60148d | 2014-01-14 14:21:52 +0100 | [diff] [blame] | 26 | CPUDIR/start.o (.text*) |
| 27 | *(.text*) |
| 28 | } > .sram |
| 29 | |
| 30 | . = ALIGN(4); |
| 31 | .rodata : { |
| 32 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| 33 | } > .sram |
| 34 | |
| 35 | . = ALIGN(4); |
| 36 | .data : { |
| 37 | *(.data*) |
| 38 | } > .sram |
| 39 | |
| 40 | . = ALIGN(4); |
| 41 | |
| 42 | . = .; |
| 43 | |
| 44 | __image_copy_end = .; |
| 45 | |
| 46 | _end = .; |
| 47 | |
| 48 | /* Move BSS section to RAM because of FAT */ |
| 49 | .bss (NOLOAD) : { |
| 50 | __bss_start = .; |
| 51 | *(.bss*) |
| 52 | . = ALIGN(4); |
| 53 | __bss_end = .; |
| 54 | } > .sdram |
| 55 | |
| 56 | /DISCARD/ : { *(.dynsym) } |
| 57 | /DISCARD/ : { *(.dynstr*) } |
| 58 | /DISCARD/ : { *(.dynamic*) } |
| 59 | /DISCARD/ : { *(.plt*) } |
| 60 | /DISCARD/ : { *(.interp*) } |
| 61 | /DISCARD/ : { *(.gnu*) } |
| 62 | } |