wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch. |
| 3 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * File: cpu_init.c |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 9 | * |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 10 | * Discription: Contains initialisation functions to setup |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 11 | * the cpu properly |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <common.h> |
| 16 | #include <mpc5xx.h> |
| 17 | #include <watchdog.h> |
| 18 | |
| 19 | /* |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 20 | * Setup essential cpu registers to run |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 21 | */ |
| 22 | void cpu_init_f (volatile immap_t * immr) |
| 23 | { |
| 24 | volatile memctl5xx_t *memctl = &immr->im_memctl; |
| 25 | ulong reg; |
| 26 | |
| 27 | /* SYPCR - contains watchdog control. This will enable watchdog */ |
| 28 | /* if CONFIG_WATCHDOG is set */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 29 | immr->im_siu_conf.sc_sypcr = CONFIG_SYS_SYPCR; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 30 | |
| 31 | #if defined(CONFIG_WATCHDOG) |
| 32 | reset_5xx_watchdog (immr); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 33 | #endif |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 34 | |
| 35 | /* SIUMCR - contains debug pin configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | immr->im_siu_conf.sc_siumcr |= CONFIG_SYS_SIUMCR; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 37 | |
| 38 | /* Initialize timebase. Unlock TBSCRK */ |
| 39 | immr->im_sitk.sitk_tbscrk = KAPWR_KEY; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | immr->im_sit.sit_tbscr = CONFIG_SYS_TBSCR; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 41 | |
| 42 | /* Full IMB bus speed */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | immr->im_uimb.uimb_umcr = CONFIG_SYS_UMCR; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 44 | |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 45 | /* Time base and decrementer will be enables (TBE) */ |
Simon Glass | 4c974d7 | 2017-03-28 10:27:24 -0600 | [diff] [blame] | 46 | /* in timer_init() in time.c called from board_init_f(). */ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 47 | |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 48 | /* Initialize the PIT. Unlock PISCRK */ |
| 49 | immr->im_sitk.sitk_piscrk = KAPWR_KEY; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 50 | immr->im_sit.sit_piscr = CONFIG_SYS_PISCR; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 51 | |
wdenk | bc01dd5 | 2004-01-02 16:05:07 +0000 | [diff] [blame] | 52 | #if !defined(CONFIG_PATI) |
| 53 | /* PATI sest PLL in start.S */ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 54 | /* PLL (CPU clock) settings */ |
| 55 | immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; |
| 56 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | /* If CONFIG_SYS_PLPRCR (set in the various *_config.h files) tries to |
| 58 | * set the MF field, then just copy CONFIG_SYS_PLPRCR over car_plprcr, |
| 59 | * otherwise OR in CONFIG_SYS_PLPRCR so we do not change the currentMF |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 60 | * field value. |
| 61 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 62 | #if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0) |
| 63 | reg = CONFIG_SYS_PLPRCR; /* reset control bits */ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 64 | #else |
| 65 | reg = immr->im_clkrst.car_plprcr; |
| 66 | reg &= PLPRCR_MF_MSK; /* isolate MF field */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 67 | reg |= CONFIG_SYS_PLPRCR; /* reset control bits */ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 68 | #endif |
| 69 | immr->im_clkrst.car_plprcr = reg; |
| 70 | |
wdenk | bc01dd5 | 2004-01-02 16:05:07 +0000 | [diff] [blame] | 71 | #endif /* !defined(CONFIG_PATI) */ |
| 72 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | /* System integration timers. CONFIG_SYS_MASK has EBDF configuration */ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 74 | immr->im_clkrstk.cark_sccrk = KAPWR_KEY; |
| 75 | reg = immr->im_clkrst.car_sccr; |
| 76 | reg &= SCCR_MASK; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | reg |= CONFIG_SYS_SCCR; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 78 | immr->im_clkrst.car_sccr = reg; |
| 79 | |
| 80 | /* Memory Controller */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM; |
| 82 | memctl->memc_or0 = CONFIG_SYS_OR0_PRELIM; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 83 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | #if (defined(CONFIG_SYS_OR1_PRELIM) && defined(CONFIG_SYS_BR1_PRELIM)) |
| 85 | memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; |
| 86 | memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 87 | #endif |
| 88 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) |
| 90 | memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; |
| 91 | memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 92 | #endif |
| 93 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | #if defined(CONFIG_SYS_OR3_PRELIM) && defined(CONFIG_SYS_BR3_PRELIM) |
| 95 | memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM; |
| 96 | memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM; |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 97 | #endif |
| 98 | |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * Initialize higher level parts of cpu |
| 103 | */ |
| 104 | int cpu_init_r (void) |
| 105 | { |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 106 | /* Nothing to do at the moment */ |
wdenk | 359733b | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 107 | return (0); |
| 108 | } |