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Christophe Leroy069fa832017-07-06 10:23:22 +02001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <commproc.h>
10#include <command.h>
11#include <serial.h>
12#include <watchdog.h>
13#include <linux/compiler.h>
14
15DECLARE_GLOBAL_DATA_PTR;
16
Christophe Leroy069fa832017-07-06 10:23:22 +020017#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
18#define SMC_INDEX 0
19#define PROFF_SMC PROFF_SMC1
20#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
Christophe Leroy394f9b32017-07-06 10:33:13 +020021#define IOPINS 0xc0
Christophe Leroy069fa832017-07-06 10:23:22 +020022
23#elif defined(CONFIG_8xx_CONS_SMC2) /* Console on SMC2 */
24#define SMC_INDEX 1
25#define PROFF_SMC PROFF_SMC2
26#define CPM_CR_CH_SMC CPM_CR_CH_SMC2
Christophe Leroy394f9b32017-07-06 10:33:13 +020027#define IOPINS 0xc00
Christophe Leroy069fa832017-07-06 10:23:22 +020028
29#endif /* CONFIG_8xx_CONS_SMCx */
30
Christophe Leroy394f9b32017-07-06 10:33:13 +020031struct serialbuffer {
Christophe Leroy069fa832017-07-06 10:23:22 +020032 cbd_t rxbd; /* Rx BD */
33 cbd_t txbd; /* Tx BD */
34 uint rxindex; /* index for next character to read */
Christophe Leroy394f9b32017-07-06 10:33:13 +020035 uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */
36 uchar txbuf; /* tx buffers */
37};
Christophe Leroy069fa832017-07-06 10:23:22 +020038
Christophe Leroy394f9b32017-07-06 10:33:13 +020039static void serial_setdivisor(cpm8xx_t __iomem *cp)
Christophe Leroy069fa832017-07-06 10:23:22 +020040{
Christophe Leroy48f896d2017-07-06 10:33:17 +020041 int divisor = (gd->cpu_clk + 8 * gd->baudrate) / 16 / gd->baudrate;
Christophe Leroy069fa832017-07-06 10:23:22 +020042
Christophe Leroy48f896d2017-07-06 10:33:17 +020043 if (divisor / 16 > 0x1000) {
Christophe Leroy069fa832017-07-06 10:23:22 +020044 /* bad divisor, assume 50MHz clock and 9600 baud */
Christophe Leroy48f896d2017-07-06 10:33:17 +020045 divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600;
Christophe Leroy069fa832017-07-06 10:23:22 +020046 }
47
Christophe Leroy069fa832017-07-06 10:23:22 +020048 divisor /= CONFIG_SYS_BRGCLK_PRESCALE;
Christophe Leroy069fa832017-07-06 10:23:22 +020049
Christophe Leroy394f9b32017-07-06 10:33:13 +020050 if (divisor <= 0x1000)
51 out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN);
52 else
53 out_be32(&cp->cp_brgc1, ((divisor / 16 - 1) << 1) | CPM_BRG_EN |
54 CPM_BRG_DIV16);
Christophe Leroy069fa832017-07-06 10:23:22 +020055}
56
57/*
58 * Minimal serial functions needed to use one of the SMC ports
59 * as serial console interface.
60 */
61
Christophe Leroy48f896d2017-07-06 10:33:17 +020062static void smc_setbrg(void)
Christophe Leroy069fa832017-07-06 10:23:22 +020063{
Christophe Leroy394f9b32017-07-06 10:33:13 +020064 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
65 cpm8xx_t __iomem *cp = &(im->im_cpm);
Christophe Leroy069fa832017-07-06 10:23:22 +020066
67 /* Set up the baud rate generator.
68 * See 8xx_io/commproc.c for details.
69 *
70 * Wire BRG1 to SMCx
71 */
72
Christophe Leroy394f9b32017-07-06 10:33:13 +020073 out_be32(&cp->cp_simode, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +020074
75 serial_setdivisor(cp);
76}
77
Christophe Leroy48f896d2017-07-06 10:33:17 +020078static int smc_init(void)
Christophe Leroy069fa832017-07-06 10:23:22 +020079{
Christophe Leroy394f9b32017-07-06 10:33:13 +020080 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
81 smc_t __iomem *sp;
82 smc_uart_t __iomem *up;
83 cpm8xx_t __iomem *cp = &(im->im_cpm);
84 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +020085
86 /* initialize pointers to SMC */
87
Christophe Leroy394f9b32017-07-06 10:33:13 +020088 sp = cp->cp_smc + SMC_INDEX;
89 up = (smc_uart_t __iomem *)&cp->cp_dparam[PROFF_SMC];
Christophe Leroy069fa832017-07-06 10:23:22 +020090 /* Disable relocation */
Christophe Leroy394f9b32017-07-06 10:33:13 +020091 out_be16(&up->smc_rpbase, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +020092
93 /* Disable transmitter/receiver. */
Christophe Leroy394f9b32017-07-06 10:33:13 +020094 clrbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
Christophe Leroy069fa832017-07-06 10:23:22 +020095
96 /* Enable SDMA. */
Christophe Leroy394f9b32017-07-06 10:33:13 +020097 out_be32(&im->im_siu_conf.sc_sdcr, 1);
Christophe Leroy069fa832017-07-06 10:23:22 +020098
99 /* clear error conditions */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200100 out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR);
Christophe Leroy069fa832017-07-06 10:23:22 +0200101
102 /* clear SDMA interrupt mask */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200103 out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR);
Christophe Leroy069fa832017-07-06 10:23:22 +0200104
Christophe Leroy394f9b32017-07-06 10:33:13 +0200105 /* Use Port B for SMCx instead of other functions. */
106 setbits_be32(&cp->cp_pbpar, IOPINS);
107 clrbits_be32(&cp->cp_pbdir, IOPINS);
108 clrbits_be16(&cp->cp_pbodr, IOPINS);
Christophe Leroy069fa832017-07-06 10:23:22 +0200109
110 /* Set the physical address of the host memory buffers in
111 * the buffer descriptors.
112 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200113 rtx = (struct serialbuffer __iomem *)&cp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200114 /* Allocate space for two buffer descriptors in the DP ram.
115 * For now, this address seems OK, but it may have to
116 * change with newer versions of the firmware.
117 * damm: allocating space after the two buffers for rx/tx data
118 */
119
Christophe Leroy394f9b32017-07-06 10:33:13 +0200120 out_be32(&rtx->rxbd.cbd_bufaddr, (__force uint)&rtx->rxbuf);
121 out_be16(&rtx->rxbd.cbd_sc, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200122
Christophe Leroy394f9b32017-07-06 10:33:13 +0200123 out_be32(&rtx->txbd.cbd_bufaddr, (__force uint)&rtx->txbuf);
124 out_be16(&rtx->txbd.cbd_sc, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200125
126 /* Set up the uart parameters in the parameter ram. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200127 out_be16(&up->smc_rbase, CPM_SERIAL_BASE);
128 out_be16(&up->smc_tbase, CPM_SERIAL_BASE + sizeof(cbd_t));
129 out_8(&up->smc_rfcr, SMC_EB);
130 out_8(&up->smc_tfcr, SMC_EB);
Christophe Leroy069fa832017-07-06 10:23:22 +0200131
132 /* Set UART mode, 8 bit, no parity, one stop.
133 * Enable receive and transmit.
134 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200135 out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
Christophe Leroy069fa832017-07-06 10:23:22 +0200136
137 /* Mask all interrupts and remove anything pending.
138 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200139 out_8(&sp->smc_smcm, 0);
140 out_8(&sp->smc_smce, 0xff);
Christophe Leroy069fa832017-07-06 10:23:22 +0200141
142 /* Set up the baud rate generator */
Christophe Leroy48f896d2017-07-06 10:33:17 +0200143 smc_setbrg();
Christophe Leroy069fa832017-07-06 10:23:22 +0200144
145 /* Make the first buffer the only buffer. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200146 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP);
147 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
Christophe Leroy069fa832017-07-06 10:23:22 +0200148
149 /* single/multi character receive. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200150 out_be16(&up->smc_mrblr, CONFIG_SYS_SMC_RXBUFLEN);
151 out_be16(&up->smc_maxidl, CONFIG_SYS_MAXIDLE);
152 out_be32(&rtx->rxindex, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200153
154 /* Initialize Tx/Rx parameters. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200155 while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */
156 ;
Christophe Leroy069fa832017-07-06 10:23:22 +0200157
Christophe Leroy394f9b32017-07-06 10:33:13 +0200158 out_be16(&cp->cp_cpcr,
159 mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG);
Christophe Leroy069fa832017-07-06 10:23:22 +0200160
Christophe Leroy394f9b32017-07-06 10:33:13 +0200161 while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */
162 ;
Christophe Leroy069fa832017-07-06 10:23:22 +0200163
164 /* Enable transmitter/receiver. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200165 setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
Christophe Leroy069fa832017-07-06 10:23:22 +0200166
Christophe Leroy48f896d2017-07-06 10:33:17 +0200167 return 0;
Christophe Leroy069fa832017-07-06 10:23:22 +0200168}
169
Christophe Leroy48f896d2017-07-06 10:33:17 +0200170static void smc_putc(const char c)
Christophe Leroy069fa832017-07-06 10:23:22 +0200171{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200172 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
173 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
174 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200175
176 if (c == '\n')
Christophe Leroy48f896d2017-07-06 10:33:17 +0200177 smc_putc('\r');
Christophe Leroy069fa832017-07-06 10:23:22 +0200178
Christophe Leroy394f9b32017-07-06 10:33:13 +0200179 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200180
181 /* Wait for last character to go. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200182 out_8(&rtx->txbuf, c);
183 out_be16(&rtx->txbd.cbd_datlen, 1);
184 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200185
Christophe Leroy394f9b32017-07-06 10:33:13 +0200186 while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY)
Christophe Leroy48f896d2017-07-06 10:33:17 +0200187 WATCHDOG_RESET();
Christophe Leroy069fa832017-07-06 10:23:22 +0200188}
189
Christophe Leroy48f896d2017-07-06 10:33:17 +0200190static void smc_puts(const char *s)
Christophe Leroy069fa832017-07-06 10:23:22 +0200191{
Christophe Leroy48f896d2017-07-06 10:33:17 +0200192 while (*s)
193 smc_putc(*s++);
Christophe Leroy069fa832017-07-06 10:23:22 +0200194}
195
Christophe Leroy48f896d2017-07-06 10:33:17 +0200196static int smc_getc(void)
Christophe Leroy069fa832017-07-06 10:23:22 +0200197{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200198 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
199 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
200 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200201 unsigned char c;
Christophe Leroy394f9b32017-07-06 10:33:13 +0200202 uint rxindex;
Christophe Leroy069fa832017-07-06 10:23:22 +0200203
Christophe Leroy394f9b32017-07-06 10:33:13 +0200204 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200205
206 /* Wait for character to show up. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200207 while (in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY)
Christophe Leroy48f896d2017-07-06 10:33:17 +0200208 WATCHDOG_RESET();
Christophe Leroy069fa832017-07-06 10:23:22 +0200209
210 /* the characters are read one by one,
211 * use the rxindex to know the next char to deliver
212 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200213 rxindex = in_be32(&rtx->rxindex);
214 c = in_8(rtx->rxbuf + rxindex);
215 rxindex++;
Christophe Leroy069fa832017-07-06 10:23:22 +0200216
217 /* check if all char are readout, then make prepare for next receive */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200218 if (rxindex >= in_be16(&rtx->rxbd.cbd_datlen)) {
219 rxindex = 0;
220 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200221 }
Christophe Leroy394f9b32017-07-06 10:33:13 +0200222 out_be32(&rtx->rxindex, rxindex);
Christophe Leroy48f896d2017-07-06 10:33:17 +0200223 return c;
Christophe Leroy069fa832017-07-06 10:23:22 +0200224}
225
Christophe Leroy48f896d2017-07-06 10:33:17 +0200226static int smc_tstc(void)
Christophe Leroy069fa832017-07-06 10:23:22 +0200227{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200228 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
229 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
230 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200231
Christophe Leroy394f9b32017-07-06 10:33:13 +0200232 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200233
Christophe Leroy394f9b32017-07-06 10:33:13 +0200234 return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200235}
236
Christophe Leroy48f896d2017-07-06 10:33:17 +0200237struct serial_device serial_smc_device = {
Christophe Leroy069fa832017-07-06 10:23:22 +0200238 .name = "serial_smc",
239 .start = smc_init,
240 .stop = NULL,
241 .setbrg = smc_setbrg,
242 .getc = smc_getc,
243 .tstc = smc_tstc,
244 .putc = smc_putc,
245 .puts = smc_puts,
246};
247
248__weak struct serial_device *default_serial_console(void)
249{
250 return &serial_smc_device;
251}
252
253void mpc8xx_serial_initialize(void)
254{
255 serial_register(&serial_smc_device);
256}