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Tom Rinia2f4c912013-08-09 11:22:17 -04001/*
2 * ti_am335x_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * For more details, please see the technical documents listed at
9 * http://www.ti.com/product/am3359#technicaldocuments
10 */
11
12#ifndef __CONFIG_TI_AM335X_COMMON_H__
13#define __CONFIG_TI_AM335X_COMMON_H__
14
15#define CONFIG_AM33XX
Tom Rinia2f4c912013-08-09 11:22:17 -040016#define CONFIG_ARCH_CPU_INIT
17#define CONFIG_SYS_CACHELINE_SIZE 64
18#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
19#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Heiko Schocher2233e462013-11-04 14:05:00 +010020#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
Tom Rinia2f4c912013-08-09 11:22:17 -040021
22#include <asm/arch/omap.h>
23
24/* NS16550 Configuration */
25#define CONFIG_SYS_NS16550
26#define CONFIG_SYS_NS16550_SERIAL
27#define CONFIG_SYS_NS16550_REG_SIZE (-4)
28#define CONFIG_SYS_NS16550_CLK 48000000
29
30/* Network defines. */
Tom Rinib3d2e2c2013-08-20 08:53:46 -040031#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
Tom Rinia2f4c912013-08-09 11:22:17 -040032#define CONFIG_CMD_DHCP
Tom Rinib3d2e2c2013-08-20 08:53:46 -040033#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
Tom Rinia2f4c912013-08-09 11:22:17 -040034#define CONFIG_BOOTP_DNS2
35#define CONFIG_BOOTP_SEND_HOSTNAME
36#define CONFIG_BOOTP_GATEWAY
37#define CONFIG_BOOTP_SUBNETMASK
38#define CONFIG_NET_RETRY_COUNT 10
Tom Rinib3d2e2c2013-08-20 08:53:46 -040039#define CONFIG_CMD_PING
40#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
41#define CONFIG_MII /* Required in net/eth.c */
Tom Rinia2f4c912013-08-09 11:22:17 -040042
Tom Rini45841f62013-08-20 08:53:43 -040043/*
Tom Rini2a766c42013-08-28 09:00:30 -040044 * RTC related defines. To use bootcount you must set bootlimit in the
Tom Rini084240b2013-11-08 13:53:14 -050045 * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT
46 * in the board config.
Tom Rini2a766c42013-08-28 09:00:30 -040047 */
Tom Rini2a766c42013-08-28 09:00:30 -040048#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
49
Tom Rini303bfe82013-10-01 12:32:04 -040050/* Enable the HW watchdog, since we can use this with bootcount */
51#define CONFIG_HW_WATCHDOG
52#define CONFIG_OMAP_WATCHDOG
53
Tom Rini2a766c42013-08-28 09:00:30 -040054/*
Tom Rini45841f62013-08-20 08:53:43 -040055 * SPL related defines. The Public RAM memory map the ROM defines the
56 * area between 0x402F0400 and 0x4030B800 as a download area and
57 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
58 * supports X-MODEM loading via UART, and we leverage this and then use
59 * Y-MODEM to load u-boot.img, when booted over UART.
60 */
Tom Rinia2f4c912013-08-09 11:22:17 -040061#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom Rini45841f62013-08-20 08:53:43 -040062#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
Tom Rinia2f4c912013-08-09 11:22:17 -040063
Tom Rini303bfe82013-10-01 12:32:04 -040064/* Enable the watchdog inside of SPL */
65#define CONFIG_SPL_WATCHDOG_SUPPORT
66
Tom Rinia2f4c912013-08-09 11:22:17 -040067/*
68 * Since SPL did pll and ddr initialization for us,
69 * we don't need to do it twice.
70 */
71#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
72#define CONFIG_SKIP_LOWLEVEL_INIT
73#endif
74
Enric Balletbò i Serra47858592013-12-06 21:30:20 +010075#ifdef CONFIG_NAND
76#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
77#endif
78
Tom Rinia2f4c912013-08-09 11:22:17 -040079/* Now bring in the rest of the common code. */
80#include <configs/ti_armv7_common.h>
81
82#endif /* __CONFIG_TI_AM335X_COMMON_H__ */