Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 2 | /* |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 3 | * (C) Copyright 2007 Michal Simek |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 4 | * (C) Copyright 2004 Atmark Techno, Inc. |
| 5 | * |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 6 | * Michal SIMEK <monstr@monstr.eu> |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 7 | * Yasushi SHOJI <yashi@atmark-techno.com> |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 10 | #include <common.h> |
| 11 | #include <command.h> |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 12 | #include <fdtdec.h> |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 13 | #include <malloc.h> |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 14 | #include <asm/microblaze_intc.h> |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 15 | #include <asm/asm.h> |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 16 | |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 19 | void enable_interrupts(void) |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 20 | { |
Michal Simek | 056dbe8 | 2015-01-26 15:25:32 +0100 | [diff] [blame] | 21 | debug("Enable interrupts for the whole CPU\n"); |
Michal Simek | 98c1979 | 2007-05-07 23:58:31 +0200 | [diff] [blame] | 22 | MSRSET(0x2); |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 23 | } |
| 24 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 25 | int disable_interrupts(void) |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 26 | { |
Michal Simek | c94f95e | 2010-12-21 08:30:39 +0100 | [diff] [blame] | 27 | unsigned int msr; |
| 28 | |
| 29 | MFS(msr, rmsr); |
Michal Simek | 98c1979 | 2007-05-07 23:58:31 +0200 | [diff] [blame] | 30 | MSRCLR(0x2); |
Michal Simek | c94f95e | 2010-12-21 08:30:39 +0100 | [diff] [blame] | 31 | return (msr & 0x2) != 0; |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 32 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 33 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 34 | static struct irq_action *vecs; |
| 35 | static u32 irq_no; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 36 | |
| 37 | /* mapping structure to interrupt controller */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 38 | microblaze_intc_t *intc; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 39 | |
| 40 | /* default handler */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 41 | static void def_hdlr(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 42 | { |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 43 | puts("def_hdlr\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 44 | } |
| 45 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 46 | static void enable_one_interrupt(int irq) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 47 | { |
| 48 | int mask; |
| 49 | int offset = 1; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 50 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 51 | offset <<= irq; |
| 52 | mask = intc->ier; |
| 53 | intc->ier = (mask | offset); |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 54 | |
| 55 | debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, |
| 56 | intc->ier); |
| 57 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 58 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 59 | } |
| 60 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 61 | static void disable_one_interrupt(int irq) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 62 | { |
| 63 | int mask; |
| 64 | int offset = 1; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 65 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 66 | offset <<= irq; |
| 67 | mask = intc->ier; |
| 68 | intc->ier = (mask & ~offset); |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 69 | |
| 70 | debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, |
| 71 | intc->ier); |
| 72 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 73 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 74 | } |
| 75 | |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 76 | int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 77 | { |
| 78 | struct irq_action *act; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 79 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 80 | /* irq out of range */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 81 | if ((irq < 0) || (irq > irq_no)) { |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 82 | puts("IRQ out of range\n"); |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 83 | return -1; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 84 | } |
| 85 | act = &vecs[irq]; |
| 86 | if (hdlr) { /* enable */ |
| 87 | act->handler = hdlr; |
| 88 | act->arg = arg; |
| 89 | act->count = 0; |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 90 | enable_one_interrupt(irq); |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 91 | return 0; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 92 | } |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 93 | |
| 94 | /* Disable */ |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 95 | act->handler = (interrupt_handler_t *)def_hdlr; |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 96 | act->arg = (void *)irq; |
| 97 | disable_one_interrupt(irq); |
| 98 | return 1; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | /* initialization interrupt controller - hardware */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 102 | static void intc_init(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 103 | { |
| 104 | intc->mer = 0; |
| 105 | intc->ier = 0; |
| 106 | intc->iar = 0xFFFFFFFF; |
| 107 | /* XIntc_Start - hw_interrupt enable and all interrupt enable */ |
| 108 | intc->mer = 0x3; |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 109 | |
| 110 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 111 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 112 | } |
| 113 | |
Michal Simek | b78df3d | 2015-01-27 12:44:12 +0100 | [diff] [blame] | 114 | int interrupt_init(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 115 | { |
| 116 | int i; |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 117 | const void *blob = gd->fdt_blob; |
| 118 | int node = 0; |
| 119 | |
| 120 | debug("INTC: Initialization\n"); |
| 121 | |
| 122 | node = fdt_node_offset_by_compatible(blob, node, |
| 123 | "xlnx,xps-intc-1.00.a"); |
| 124 | if (node != -1) { |
| 125 | fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); |
| 126 | if (base == FDT_ADDR_T_NONE) |
| 127 | return -1; |
| 128 | |
| 129 | debug("INTC: Base addr %lx\n", base); |
| 130 | intc = (microblaze_intc_t *)base; |
| 131 | irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); |
| 132 | debug("INTC: IRQ NO %x\n", irq_no); |
| 133 | } else { |
| 134 | return node; |
| 135 | } |
Michal Simek | c3d51b9 | 2016-02-15 13:44:19 +0100 | [diff] [blame] | 136 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 137 | if (irq_no) { |
| 138 | vecs = calloc(1, sizeof(struct irq_action) * irq_no); |
| 139 | if (vecs == NULL) { |
| 140 | puts("Interrupt vector allocation failed\n"); |
| 141 | return -1; |
| 142 | } |
| 143 | |
| 144 | /* initialize irq list */ |
| 145 | for (i = 0; i < irq_no; i++) { |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 146 | vecs[i].handler = (interrupt_handler_t *)def_hdlr; |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 147 | vecs[i].arg = (void *)i; |
| 148 | vecs[i].count = 0; |
| 149 | } |
| 150 | /* initialize intc controller */ |
| 151 | intc_init(); |
| 152 | enable_interrupts(); |
| 153 | } else { |
| 154 | puts("Undefined interrupt controller\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 155 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 156 | return 0; |
| 157 | } |
| 158 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 159 | void interrupt_handler(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 160 | { |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 161 | int irqs = intc->ivr; /* find active interrupt */ |
| 162 | int mask = 1; |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 163 | int value; |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 164 | struct irq_action *act = vecs + irqs; |
| 165 | |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 166 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 167 | intc->iar, intc->mer); |
| 168 | #ifdef DEBUG |
| 169 | R14(value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 170 | #endif |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 171 | debug("Interrupt handler on %x line, r14 %x\n", irqs, value); |
| 172 | |
| 173 | debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", |
| 174 | (u32)act->handler, act->count, (u32)act->arg); |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 175 | act->handler(act->arg); |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 176 | act->count++; |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 177 | |
Stephan Linz | 5db50d6 | 2012-02-22 19:12:43 +0100 | [diff] [blame] | 178 | intc->iar = mask << irqs; |
| 179 | |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 180 | debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, |
| 181 | intc->ier, intc->iar, intc->mer); |
| 182 | #ifdef DEBUG |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 183 | R14(value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 184 | #endif |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 185 | debug("Interrupt handler on %x line, r14 %x\n", irqs, value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 186 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 187 | |
Jon Loeliger | 526e5ce | 2007-07-09 19:06:00 -0500 | [diff] [blame] | 188 | #if defined(CONFIG_CMD_IRQ) |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 189 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[]) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 190 | { |
| 191 | int i; |
| 192 | struct irq_action *act = vecs; |
| 193 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 194 | if (irq_no) { |
| 195 | puts("\nInterrupt-Information:\n\n" |
| 196 | "Nr Routine Arg Count\n" |
| 197 | "-----------------------------\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 198 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 199 | for (i = 0; i < irq_no; i++) { |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 200 | if (act->handler != (interrupt_handler_t *)def_hdlr) { |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 201 | printf("%02d %08x %08x %d\n", i, |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 202 | (int)act->handler, (int)act->arg, |
| 203 | act->count); |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 204 | } |
| 205 | act++; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 206 | } |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 207 | puts("\n"); |
| 208 | } else { |
| 209 | puts("Undefined interrupt controller\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 210 | } |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 211 | return 0; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 212 | } |
| 213 | #endif |