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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chander Kashyapbfef54d2011-05-24 20:02:56 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
4 *
Chander Kashyap4131a772011-12-06 23:34:12 +00005 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyapbfef54d2011-05-24 20:02:56 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Simon Glass05b3bac32014-10-07 22:01:49 -060011#include "exynos4-common.h"
12
13#undef CONFIG_BOARD_COMMON
Marek Vasutbc623f22015-08-19 23:27:26 +020014#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
Simon Glass05b3bac32014-10-07 22:01:49 -060015
Chander Kashyapbfef54d2011-05-24 20:02:56 +000016/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +000017#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000018
Chander Kashyapbfef54d2011-05-24 20:02:56 +000019#define CONFIG_SYS_SDRAM_BASE 0x40000000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000020
Chander Kashyapbfef54d2011-05-24 20:02:56 +000021/* Handling Sleep Mode*/
22#define S5P_CHECK_SLEEP 0x00000BAD
23#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shindebed24422013-07-04 12:29:17 +053024#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000025
Chander Kashyap0cd984c2011-09-20 21:25:03 +000026/* MMC SPL */
Chander Kashyape8d043e2011-09-20 21:25:04 +000027#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyapbfef54d2011-05-24 20:02:56 +000028
29#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
30
Chander Kashyapbfef54d2011-05-24 20:02:56 +000031/* SMDKV310 has 4 bank of DRAM */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000032#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
33#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
34#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
35#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
36#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
37#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
38#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
39#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
40#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
41
42/* FLASH and environment organization */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000043
Chander Kashyapbfef54d2011-05-24 20:02:56 +000044#define CONFIG_CLK_1000_400_200
45
46/* MIU (Memory Interleaving Unit) */
47#define CONFIG_MIU_2BIT_INTERLEAVED
48
Chander Kashyapbfef54d2011-05-24 20:02:56 +000049#define RESERVE_BLOCK_SIZE (512)
50#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
Chander Kashyapbfef54d2011-05-24 20:02:56 +000051
Rajeshwari Shindebed24422013-07-04 12:29:17 +053052#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
53
54#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000055
Bin Meng75574052016-02-05 19:30:11 -080056/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyapbfef54d2011-05-24 20:02:56 +000057#define COPY_BL2_SIZE 0x80000
58#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
59#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
60
61/* Ethernet Controllor Driver */
62#ifdef CONFIG_CMD_NET
Chander Kashyapbfef54d2011-05-24 20:02:56 +000063#define CONFIG_ENV_SROM_BANK 1
64#endif /*CONFIG_CMD_NET*/
Thomas Abraham4cd38a42011-06-03 22:52:17 +000065
Chander Kashyapbfef54d2011-05-24 20:02:56 +000066#endif /* __CONFIG_H */