blob: 4a2f6fa95534471a1671f18116daa5f2ee8e33c0 [file] [log] [blame]
Lad Prabhakarb4b65ec2021-03-15 22:24:05 +00001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8/ {
9 model = "Silicon Linux sub board for CAT874 (CAT875)";
10
11 aliases {
12 ethernet0 = &avb;
13 };
14};
15
16&avb {
17 pinctrl-0 = <&avb_pins>;
18 pinctrl-names = "default";
19 renesas,no-ether-link;
20 phy-handle = <&phy0>;
21 status = "okay";
22
23 phy0: ethernet-phy@0 {
24 reg = <0>;
25 interrupt-parent = <&gpio2>;
26 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
27 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
28 };
29};
30
31&can0 {
32 pinctrl-0 = <&can0_pins>;
33 pinctrl-names = "default";
34 status = "okay";
35};
36
37&can1 {
38 pinctrl-0 = <&can1_pins>;
39 pinctrl-names = "default";
40 status = "okay";
41};
42
43&pciec0 {
44 status = "okay";
45};
46
47&pfc {
48 avb_pins: avb {
49 mux {
50 groups = "avb_mii";
51 function = "avb";
52 };
53 };
54
55 can0_pins: can0 {
56 groups = "can0_data";
57 function = "can0";
58 };
59
60 can1_pins: can1 {
61 groups = "can1_data";
62 function = "can1";
63 };
64};