arch/arm/dts/rk3588-edgeble-neu6b-io.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
 */

/dts-v1/;
#include "rk3588j.dtsi"
#include "rk3588-edgeble-neu6b.dtsi"

/ {
	model = "Edgeble Neu6B IO Board";
	compatible = "edgeble,neural-compute-module-6a-io",
		     "edgeble,neural-compute-module-6b", "rockchip,rk3588";

	chosen {
		stdout-path = "serial2:1500000n8";
	};
};

&combphy0_ps {
	status = "okay";
};

&i2c6 {
	status = "okay";

	hym8563: rtc@51 {
		compatible = "haoyu,hym8563";
		reg = <0x51>;
		interrupt-parent = <&gpio0>;
		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
		#clock-cells = <0>;
		clock-output-names = "hym8563";
		pinctrl-names = "default";
		pinctrl-0 = <&hym8563_int>;
		wakeup-source;
	};
};

&pinctrl {
	hym8563 {
		hym8563_int: hym8563-int {
			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

/* FAN */
&pwm2 {
	pinctrl-0 = <&pwm2m1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sata0 {
	status = "okay";
};

&sdmmc {
	bus-width = <4>;
	cap-mmc-highspeed;
	cap-sd-highspeed;
	disable-wp;
	no-sdio;
	no-mmc;
	sd-uhs-sdr104;
	vmmc-supply = <&vcc_3v3_s3>;
	vqmmc-supply = <&vccio_sd_s0>;
	status = "okay";
};

&uart2 {
	pinctrl-0 = <&uart2m0_xfer>;
	status = "okay";
};

/* RS232 */
&uart6 {
	pinctrl-0 = <&uart6m0_xfer>;
	pinctrl-names = "default";
	status = "okay";
};

/* RS485 */
&uart7 {
	pinctrl-0 = <&uart7m2_xfer>;
	pinctrl-names = "default";
	status = "okay";
};