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git01.mediatek.com / filogic / uboot / b464044f6ee1de0c2643e1baea7317a2b1cc5963 / . / configs / nanopi-r2c-rk3328_defconfig
blob: a4cb148246e659d5c60e8761ab690a78a5f56941 [file] [log] [blame]
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_TEXT_BASE=0x00200000
6CONFIG_SPL_GPIO=y
7CONFIG_NR_DRAM_BANKS=1
8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]10CONFIG_SF_DEFAULT_SPEED=20000000
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]11CONFIG_ENV_OFFSET=0x3F8000
12CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c"
13CONFIG_DM_RESET=y
14CONFIG_ROCKCHIP_RK3328=y
15CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
16CONFIG_TPL_LIBCOMMON_SUPPORT=y
17CONFIG_TPL_LIBGENERIC_SUPPORT=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]18CONFIG_SPL_STACK_R_ADDR=0x600000
19CONFIG_SPL_STACK=0x400000
20CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
21CONFIG_DEBUG_UART_BASE=0xFF130000
22CONFIG_DEBUG_UART_CLOCK=24000000
23CONFIG_SYS_LOAD_ADDR=0x800800
24CONFIG_DEBUG_UART=y
25# CONFIG_ANDROID_BOOT_IMAGE is not set
26CONFIG_FIT=y
27CONFIG_FIT_VERBOSE=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]28CONFIG_SPL_FIT_SIGNATURE=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]29CONFIG_SPL_LOAD_FIT=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]30CONFIG_LEGACY_IMAGE_FORMAT=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]31CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
32# CONFIG_DISPLAY_CPUINFO is not set
33CONFIG_DISPLAY_BOARDINFO_LATE=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]34CONFIG_SPL_MAX_SIZE=0x40000
35CONFIG_SPL_PAD_TO=0x7f8000
36CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
37CONFIG_SPL_BSS_START_ADDR=0x2000000
38CONFIG_SPL_BSS_MAX_SIZE=0x2000
39# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
40# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
41CONFIG_SPL_STACK_R=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]42CONFIG_SPL_POWER=y
43CONFIG_SPL_ATF=y
44CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
45CONFIG_TPL_SYS_MALLOC_SIMPLE=y
46CONFIG_CMD_BOOTZ=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]47CONFIG_CMD_GPIO=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]48CONFIG_CMD_GPT=y
49CONFIG_CMD_MMC=y
50CONFIG_CMD_USB=y
51# CONFIG_CMD_SETEXPR is not set
52CONFIG_CMD_TIME=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]53CONFIG_CMD_REGULATOR=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]54CONFIG_SPL_OF_CONTROL=y
55CONFIG_TPL_OF_CONTROL=y
56CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
57CONFIG_TPL_OF_PLATDATA=y
58CONFIG_ENV_IS_IN_MMC=y
59CONFIG_SYS_RELOC_GD_ENV_ADDR=y
60CONFIG_SYS_MMC_ENV_DEV=1
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]61CONFIG_TPL_DM=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]62CONFIG_SPL_DM_SEQ_ALIAS=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]63CONFIG_REGMAP=y
64CONFIG_SPL_REGMAP=y
65CONFIG_TPL_REGMAP=y
66CONFIG_SYSCON=y
67CONFIG_SPL_SYSCON=y
68CONFIG_TPL_SYSCON=y
69CONFIG_CLK=y
70CONFIG_SPL_CLK=y
71CONFIG_FASTBOOT_BUF_ADDR=0x800800
72CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
73CONFIG_ROCKCHIP_GPIO=y
74CONFIG_SYS_I2C_ROCKCHIP=y
75CONFIG_MMC_DW=y
76CONFIG_MMC_DW_ROCKCHIP=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]77CONFIG_PHY_MOTORCOMM=y
78CONFIG_PHY_REALTEK=y
79CONFIG_DM_MDIO=y
80CONFIG_DM_ETH_PHY=y
81CONFIG_PHY_GIGE=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]82CONFIG_ETH_DESIGNWARE=y
83CONFIG_GMAC_ROCKCHIP=y
Jagan Tekibf0e1342023-06-06 22:39:18 +0530[diff] [blame]84CONFIG_PHY_ROCKCHIP_INNO_USB2=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]85CONFIG_PINCTRL=y
86CONFIG_SPL_PINCTRL=y
87CONFIG_DM_PMIC=y
88CONFIG_PMIC_RK8XX=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]89CONFIG_SPL_DM_REGULATOR=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]90CONFIG_DM_REGULATOR_FIXED=y
91CONFIG_SPL_DM_REGULATOR_FIXED=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]92CONFIG_DM_REGULATOR_GPIO=y
93CONFIG_SPL_DM_REGULATOR_GPIO=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]94CONFIG_REGULATOR_RK8XX=y
95CONFIG_PWM_ROCKCHIP=y
96CONFIG_RAM=y
97CONFIG_SPL_RAM=y
98CONFIG_TPL_RAM=y
Jonas Karlmanb03dfd12024-02-17 00:22:32 +0000[diff] [blame]99CONFIG_DM_RNG=y
100CONFIG_RNG_ROCKCHIP=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]101CONFIG_BAUDRATE=1500000
102CONFIG_DEBUG_UART_SHIFT=2
103CONFIG_SYS_NS16550_MEM32=y
104CONFIG_SYSINFO=y
105CONFIG_SYSRESET=y
106# CONFIG_TPL_SYSRESET is not set
107CONFIG_USB=y
108CONFIG_USB_XHCI_HCD=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]109CONFIG_USB_EHCI_HCD=y
110CONFIG_USB_EHCI_GENERIC=y
111CONFIG_USB_OHCI_HCD=y
112CONFIG_USB_OHCI_GENERIC=y
113CONFIG_USB_DWC2=y
114CONFIG_USB_DWC3=y
115# CONFIG_USB_DWC3_GADGET is not set
Jagan Teki94e59a12023-06-06 22:39:15 +0530[diff] [blame]116CONFIG_USB_DWC3_GENERIC=y
Tianling Shen905dfa22023-04-11 18:14:49 +0800[diff] [blame]117CONFIG_USB_GADGET=y
118CONFIG_USB_GADGET_DWC2_OTG=y
119CONFIG_SPL_TINY_MEMSET=y
120CONFIG_TPL_TINY_MEMSET=y
121CONFIG_ERRNO_STR=y