Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> |
| 4 | * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _CONFIG_CONTROLCENTERDC_H |
| 8 | #define _CONFIG_CONTROLCENTERDC_H |
| 9 | |
| 10 | /* |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 11 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed |
| 12 | * for DDR ECC byte filling in the SPL before loading the main |
| 13 | * U-Boot into it. |
| 14 | */ |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 15 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 16 | /* Environment in SPI NOR flash */ |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 17 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 18 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 19 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 20 | /* |
| 21 | * Environment Configuration |
| 22 | */ |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 23 | |
Mario Six | 790d844 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 24 | #define CONFIG_HOSTNAME "ccdc" |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 25 | #define CONFIG_ROOTPATH "/opt/nfsroot" |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 26 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 27 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 28 | "netdev=eth1\0" \ |
| 29 | "consoledev=ttyS1\0" \ |
| 30 | "u-boot=u-boot.bin\0" \ |
| 31 | "bootfile_addr=1000000\0" \ |
| 32 | "keyprogram_addr=3000000\0" \ |
| 33 | "keyprogram_file=keyprogram.img\0" \ |
| 34 | "fdtfile=controlcenterdc.dtb\0" \ |
| 35 | "load=tftpboot ${loadaddr} ${u-boot}\0" \ |
| 36 | "mmcdev=0:2\0" \ |
| 37 | "update=sf probe 1:0;" \ |
| 38 | " sf erase 0 +${filesize};" \ |
| 39 | " sf write ${fileaddr} 0 ${filesize}\0" \ |
| 40 | "upd=run load update\0" \ |
| 41 | "fdt_high=0x10000000\0" \ |
| 42 | "initrd_high=0x10000000\0" \ |
| 43 | "loadkeyprogram=tpm flush_keys;" \ |
| 44 | " mmc rescan;" \ |
| 45 | " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\ |
| 46 | " source ${keyprogram_addr}:script@1\0" \ |
| 47 | "gpio1=gpio@22_25\0" \ |
| 48 | "gpio2=A29\0" \ |
| 49 | "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \ |
| 50 | "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \ |
| 51 | "bootfail=for i in ${blinkseq}; do" \ |
| 52 | " if test $i -eq 0; then" \ |
| 53 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ |
| 54 | " elif test $i -eq 1; then" \ |
| 55 | " gpio clear ${gpio1}; gpio clear ${gpio2};" \ |
| 56 | " elif test $i -eq 2; then" \ |
| 57 | " gpio set ${gpio1}; gpio set ${gpio2};" \ |
| 58 | " else;" \ |
| 59 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ |
| 60 | " fi; sleep 0.12; done\0" |
| 61 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 62 | /* |
| 63 | * mv-common.h should be defined after CMD configs since it used them |
| 64 | * to enable certain macros |
| 65 | */ |
| 66 | #include "mv-common.h" |
| 67 | |
| 68 | #endif /* _CONFIG_CONTROLCENTERDC_H */ |