Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * John Otken, jotken@softadvances.com |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | /************************************************************************ |
| 26 | * luan.h - configuration for LUAN board |
| 27 | ***********************************************************************/ |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | /*----------------------------------------------------------------------- |
| 32 | * High Level Configuration Options |
| 33 | *----------------------------------------------------------------------*/ |
| 34 | #define CONFIG_LUAN 1 /* Board is Luan */ |
| 35 | #define CONFIG_440SP 1 /* Specific PPC440SP support */ |
| 36 | #define CONFIG_4xx 1 /* PPC4xx family */ |
| 37 | #define CONFIG_440 1 |
| 38 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ |
| 39 | |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 40 | #define CONFIG_SYS_TEXT_BASE 0xFFFB0000 |
| 41 | |
Stefan Roese | d4c0b70 | 2008-06-06 15:55:03 +0200 | [diff] [blame] | 42 | /* |
| 43 | * Include common defines/options for all AMCC eval boards |
| 44 | */ |
| 45 | #define CONFIG_HOSTNAME luan |
| 46 | #include "amcc-common.h" |
| 47 | |
Stefan Roese | 05ac303 | 2007-03-08 10:13:16 +0100 | [diff] [blame] | 48 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 49 | #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ |
| 50 | |
| 51 | /*----------------------------------------------------------------------- |
| 52 | * Base addresses -- Note these are effective addresses where the |
| 53 | * actual resources get mapped (not physical addresses) |
| 54 | *----------------------------------------------------------------------*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | #define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */ |
| 56 | #define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */ |
| 57 | #define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */ |
Wolfgang Denk | 2fc54d9 | 2010-09-10 23:04:05 +0200 | [diff] [blame] | 58 | #define CONFIG_SYS_SRAM_SIZE (1 << 20) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 60 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | #define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 62 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 63 | #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ |
| 64 | #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ |
| 65 | #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 66 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 67 | #if CONFIG_SYS_LARGE_FLASH == 0xffc00000 |
| 68 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 69 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 71 | #endif |
| 72 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #if CONFIG_SYS_SRAM_BASE |
| 74 | #define CONFIG_SYS_KBYTES_SDRAM 1024*2 |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 75 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_KBYTES_SDRAM 1024 |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 77 | #endif |
| 78 | |
| 79 | /*----------------------------------------------------------------------- |
| 80 | * Initial RAM & stack pointer (placed in SDRAM) |
| 81 | *----------------------------------------------------------------------*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 82 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 83 | #define CONFIG_SYS_INIT_RAM_SIZE (8 << 10) |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 84 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 86 | |
| 87 | /*----------------------------------------------------------------------- |
| 88 | * Serial Port |
| 89 | *----------------------------------------------------------------------*/ |
Stefan Roese | 3ddce57 | 2010-09-20 16:05:31 +0200 | [diff] [blame] | 90 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 92 | |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 93 | /*----------------------------------------------------------------------- |
| 94 | * Environment |
| 95 | *----------------------------------------------------------------------*/ |
| 96 | /* |
| 97 | * Define here the location of the environment variables (FLASH or EEPROM). |
| 98 | * Note: DENX encourages to use redundant environment in FLASH. |
| 99 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 100 | #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 101 | |
| 102 | /*----------------------------------------------------------------------- |
| 103 | * FLASH related |
| 104 | *----------------------------------------------------------------------*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */ |
| 106 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 107 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
| 109 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 110 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 111 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 112 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 113 | #define CONFIG_SYS_FLASH_ADDR0 0x555 |
| 114 | #define CONFIG_SYS_FLASH_ADDR1 0x2aa |
| 115 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 116 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 117 | #ifdef CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 118 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 120 | #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 121 | |
| 122 | /* Address and size of Redundant Environment Sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 123 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) |
| 124 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 125 | #endif /* CONFIG_ENV_IS_IN_FLASH */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 126 | |
| 127 | /*----------------------------------------------------------------------- |
| 128 | * DDR SDRAM |
| 129 | *----------------------------------------------------------------------*/ |
Stefan Roese | 05ac303 | 2007-03-08 10:13:16 +0100 | [diff] [blame] | 130 | #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ |
| 131 | #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/ |
Stefan Roese | 5abe567 | 2007-06-01 13:45:24 +0200 | [diff] [blame] | 132 | #define CONFIG_DDR_ECC 1 /* with ECC support */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 133 | |
| 134 | /*----------------------------------------------------------------------- |
| 135 | * I2C |
| 136 | *----------------------------------------------------------------------*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_I2C_MULTI_EEPROMS |
| 140 | #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) |
| 141 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 142 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 |
| 143 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
Stefan Roese | b0ff214 | 2006-08-07 14:33:32 +0200 | [diff] [blame] | 144 | |
Stefan Roese | d4c0b70 | 2008-06-06 15:55:03 +0200 | [diff] [blame] | 145 | /* |
| 146 | * Default environment variables |
| 147 | */ |
| 148 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 149 | CONFIG_AMCC_DEF_ENV \ |
| 150 | CONFIG_AMCC_DEF_ENV_PPC \ |
| 151 | CONFIG_AMCC_DEF_ENV_NOR_UPD \ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 152 | "kernel_addr=fc000000\0" \ |
| 153 | "ramdisk_addr=fc100000\0" \ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 154 | "" |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 155 | |
Stefan Roese | a98dfe6 | 2008-05-08 11:05:15 +0200 | [diff] [blame] | 156 | #define CONFIG_HAS_ETH0 |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 157 | #define CONFIG_PHY_ADDR 1 |
| 158 | #define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */ |
| 159 | #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ |
| 160 | |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 161 | #ifdef DEBUG |
| 162 | #define CONFIG_PANIC_HANG |
| 163 | #else |
| 164 | #define CONFIG_HW_WATCHDOG /* watchdog */ |
| 165 | #endif |
| 166 | |
Jon Loeliger | b004421 | 2007-07-04 22:32:57 -0500 | [diff] [blame] | 167 | /* |
Stefan Roese | d4c0b70 | 2008-06-06 15:55:03 +0200 | [diff] [blame] | 168 | * Commands additional to the ones defined in amcc-common.h |
Jon Loeliger | 140b69c | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 169 | */ |
Jon Loeliger | b004421 | 2007-07-04 22:32:57 -0500 | [diff] [blame] | 170 | #define CONFIG_CMD_PCI |
Jon Loeliger | b004421 | 2007-07-04 22:32:57 -0500 | [diff] [blame] | 171 | #define CONFIG_CMD_SDRAM |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 172 | |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 173 | /*----------------------------------------------------------------------- |
| 174 | * PCI stuff |
| 175 | *----------------------------------------------------------------------- |
| 176 | */ |
Jon Loeliger | b004421 | 2007-07-04 22:32:57 -0500 | [diff] [blame] | 177 | #if defined(CONFIG_CMD_PCI) |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 178 | |
| 179 | /* General PCI */ |
| 180 | #define CONFIG_PCI /* include pci support */ |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame^] | 181 | #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 182 | #define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ |
| 183 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
| 184 | |
| 185 | /* Board-specific PCI */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 186 | #define CONFIG_SYS_PCI_TARGET_INIT |
| 187 | #undef CONFIG_SYS_PCI_MASTER_INIT |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 188 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ |
| 190 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */ |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 191 | |
Jon Loeliger | b004421 | 2007-07-04 22:32:57 -0500 | [diff] [blame] | 192 | #endif |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 193 | |
Stefan Roese | 9964474 | 2005-11-29 18:18:21 +0100 | [diff] [blame] | 194 | #endif /* __CONFIG_H */ |