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Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +02001/*
2 * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
22
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020023/*
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 *
26 * Standard configuration - all models
27 * 0xFFF00000 boot from flash
28 *
29 * Test configuration (boot from RAM using uloader.o)
30 * LinkStation HD-HLAN and KuroBox Standard
31 * 0x03F00000 boot from RAM
32 * LinkStation HD-HGLAN and KuroBox HG
33 * 0x07F00000 boot from RAM
34 */
35#ifndef CONFIG_SYS_TEXT_BASE
36#define CONFIG_SYS_TEXT_BASE 0xFFF00000
37#endif
38
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +020039#if 0
40#define DEBUG
41#endif
42
43#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
44
45/*-----------------------------------------------------------------------
46 * User configurable settings:
47 * Mandatory settings:
48 * CONFIG_IPADDR_LS - the IP address of the LinkStation
49 * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP
50 * Optional settins:
51 * CONFIG_NCIP_LS - the adress of the computer running net console
52 * if not configured, it will be set to
53 * CONFIG_SERVERIP_LS
54 */
55
56
57#define CONFIG_IPADDR_LS 192.168.11.150
58#define CONFIG_SERVERIP_LS 192.168.11.149
59
60#if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS)
61#error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined
62#endif
63
64#if !defined(CONFIG_NCIP_LS)
65#define CONFIG_NCIP_LS CONFIG_SERVERIP_LS
66#endif
67
68/*----------------------------------------------------------------------
69 * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING
70 *---------------------------------------------------------------------*/
71
72#define CONFIG_MPC8245 1
73#define CONFIG_LINKSTATION 1
74
75/*---------------------------------------
76 * Supported models
77 *
78 * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN)
79 * LinkStation old model (CONFIG_LAN) - totally untested
80 * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN)
81 *
82 * Models not supported yet
83 * TeraStatin (CONFIG_HTGL)
84 */
85
86#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
87#define CONFIG_IDENT_STRING " LinkStation / KuroBox"
88#elif defined(CONFIG_HGLAN)
89#define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG"
90#elif defined(CONFIG_HTGL)
91#define CONFIG_IDENT_STRING " TeraStation"
92#else
93#error No LinkStation model defined
94#endif
95
96#define CONFIG_BOOTDELAY 5
97#define CONFIG_ZERO_BOOTDELAY_CHECK
98#undef CONFIG_BOOT_RETRY_TIME
99
100#define CONFIG_AUTOBOOT_KEYED
Wolfgang Denkdd5463b2008-07-16 16:38:59 +0200101#define CONFIG_AUTOBOOT_PROMPT \
102 "Boot in %02d seconds ('s' to stop)...", bootdelay
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200103#define CONFIG_AUTOBOOT_STOP_STR "s"
104
105#define CONFIG_CMD_IDE
106#define CONFIG_CMD_PCI
107#define CONFIG_CMD_DHCP
108#define CONFIG_CMD_PING
109#define CONFIG_CMD_EXT2
110
111#define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
112
113#define CONFIG_OF_LIBFDT 1
114
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200115#define OF_STDOUT_PATH "/soc10x/serial@80004600"
116
117/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
118#include <config_cmd_default.h>
119
120/*
121 * Miscellaneous configurable options
122 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_LONGHELP /* undef to save memory */
124#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
125#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200126
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
128#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
129#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
130#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200131
Wolfgang Denka1be4762008-05-20 16:00:29 +0200132#define CONFIG_BOOTCOMMAND "run bootcmd1"
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200133#define CONFIG_BOOTARGS "root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug"
Wolfgang Denka1be4762008-05-20 16:00:29 +0200134#define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm"
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200135
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200137
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200138#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
139#define UBFILE "share/u-boot/u-boot-hd.flash.bin"
140#elif defined(CONFIG_HGLAN)
141#define UBFILE "share/u-boot/u-boot-hg.flash.bin"
142#elif defined(CONFIG_HTGL)
143#define UBFILE "share/u-boot/u-boot-ht.flash.bin"
144#else
145#error No LinkStation model defined
146#endif
147
148#define CONFIG_EXTRA_ENV_SETTINGS \
149 "autoload=no\0" \
150 "stdin=nc\0" \
151 "stdout=nc\0" \
152 "stderr=nc\0" \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200153 "ipaddr="__stringify(CONFIG_IPADDR_LS)"\0" \
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200154 "netmask=255.255.255.0\0" \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200155 "serverip="__stringify(CONFIG_SERVERIP_LS)"\0" \
156 "ncip="__stringify(CONFIG_NCIP_LS)"\0" \
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200157 "netretry=no\0" \
158 "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \
159 "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \
160 "ldaddr=800000\0" \
161 "hdpart=0:1\0" \
162 "hdfile=boot/uImage\0" \
163 "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0" \
164 "boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0" \
165 "hdboot=run hdload;run boothd\0" \
166 "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \
167 "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \
168 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
169 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
170 "bootretry=30\0" \
171 "bootcmd1=run hdboot;run flboot\0" \
172 "bootcmd2=run flboot\0" \
173 "bootcmd3=run emboot\0" \
174 "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \
175 "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \
176 "ubpart=0:3\0" \
177 "ubfile="UBFILE"\0" \
178 "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \
179 "ubsaddr=fff00000\0" \
180 "ubeaddr=fff2ffff\0" \
181 "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \
182 "upgrade=run ubload ubflash\0"
183
184/*-----------------------------------------------------------------------
185 * PCI stuff
186 */
187#define CONFIG_PCI
Gabor Juhosb4458732013-05-30 07:06:12 +0000188#define CONFIG_PCI_INDIRECT_BRIDGE
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200189/* Verified: CONFIG_PCI_PNP doesn't work */
190#undef CONFIG_PCI_PNP
191#define CONFIG_PCI_SCAN_SHOW
192
193#ifndef CONFIG_PCI_PNP
194/* Keep the following defines in sync with the BAT mappings */
195
196#define PCI_ETH_IOADDR 0xbfff00
197#define PCI_ETH_MEMADDR 0xbffffc00
198#define PCI_IDE_IOADDR 0xbffed0
199#define PCI_IDE_MEMADDR 0xbffffb00
200#define PCI_USB0_IOADDR 0
201#define PCI_USB0_MEMADDR 0xbfffe000
202#define PCI_USB1_IOADDR 0
203#define PCI_USB1_MEMADDR 0xbfffd000
204#define PCI_USB2_IOADDR 0
205#define PCI_USB2_MEMADDR 0xbfffcf00
206
207#endif
208
209/*-----------------------------------------------------------------------
210 * Ethernet stuff
211 */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200212
213#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
214#define CONFIG_TULIP
215#define CONFIG_TULIP_USE_IO
216#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
217#define CONFIG_RTL8169
218#endif
219
220#define CONFIG_NET_RETRY_COUNT 5
221
222#define CONFIG_NETCONSOLE
223
224/*-----------------------------------------------------------------------
225 * Start addresses for the final memory configuration
226 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200227 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200228 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200229#define CONFIG_SYS_SDRAM_BASE 0x00000000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200230
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_FLASH_BASE 0xFFC00000
232#define CONFIG_SYS_FLASH_SIZE 0x00400000
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200233#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200234
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
236#define CONFIG_SYS_EUMB_ADDR 0x80000000
237#define CONFIG_SYS_PCI_MEM_ADDR 0xB0000000
238#define CONFIG_SYS_MISC_REGION_ADDR 0xFE000000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200239
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256 kB */
241#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200242
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
244#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200245
246/* Maximum amount of RAM */
247#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200249#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200250#define CONFIG_SYS_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200251#else
252#error Unknown LinkStation type
253#endif
254
255/*-----------------------------------------------------------------------
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200256 * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200257 *
258 * RAM based builds are for testing purposes. A Linux module, uloader.o,
259 * exists to load U-Boot and pass control to it
260 *
261 * Always do "make clean" after changing the build type
262 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200263#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
264#define CONFIG_SYS_RAMBOOT
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200265#endif
266
267/*-----------------------------------------------------------------------
268 * Definitions for initial stack pointer and data area
269 */
270#if 1 /* RAM is available when the first C function is called */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200271#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 0x1000)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200272#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200273#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200274#endif
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200275#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
Wolfgang Denk0191e472010-10-26 14:34:52 +0200276#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200277
278/*----------------------------------------------------------------------
279 * Serial configuration
280 */
281#define CONFIG_CONS_INDEX 1
282#define CONFIG_BAUDRATE 57600
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200283
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200284#define CONFIG_SYS_NS16550
285#define CONFIG_SYS_NS16550_SERIAL
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200286
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200287#define CONFIG_SYS_NS16550_REG_SIZE 1
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200288
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200289#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200290
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200291#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4600) /* Console port */
292#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4500) /* AVR port */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200293
294/*
295 * Low Level Configuration Settings
296 * (address mappings, register initial values, etc.)
297 * You should know what you are doing if you make changes here.
298 * For the detail description refer to the MPC8245 user's manual.
299 *
300 * Unless indicated otherwise, the values are
301 * taken from the orignal Linkstation boot code
302 *
303 * Most of the low level configuration setttings are normally used
Stefan Roese88fbf932010-04-15 16:07:28 +0200304 * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200305 * Low level initialisation is done in board/linkstation/early_init.S
306 * The values below are included for reference purpose only
307 */
308
309/* FIXME: 32.768 MHz is the crystal frequency but */
310/* the real frequency is lower by about 0.75% */
311#define CONFIG_SYS_CLK_FREQ 32768000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200312#define CONFIG_SYS_HZ 1000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200313
314/* Bit-field values for MCCR1. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200315#define CONFIG_SYS_ROMNAL 0
316#define CONFIG_SYS_ROMFAL 11
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200317
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200318#define CONFIG_SYS_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */
319#define CONFIG_SYS_BANK1_ROW 0
320#define CONFIG_SYS_BANK2_ROW 0
321#define CONFIG_SYS_BANK3_ROW 0
322#define CONFIG_SYS_BANK4_ROW 0
323#define CONFIG_SYS_BANK5_ROW 0
324#define CONFIG_SYS_BANK6_ROW 0
325#define CONFIG_SYS_BANK7_ROW 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200326
327/* Bit-field values for MCCR2. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200328#define CONFIG_SYS_TSWAIT 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200329#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200330#define CONFIG_SYS_REFINT 0x15e0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200331#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200332#define CONFIG_SYS_REFINT 0x1580
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200333#endif
334
335/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200336#define CONFIG_SYS_BSTOPRE 0x91c
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200337
338/* Bit-field values for MCCR3. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200339#define CONFIG_SYS_REFREC 7
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200340
341/* Bit-field values for MCCR4. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200342#define CONFIG_SYS_PRETOACT 2
343#define CONFIG_SYS_ACTTOPRE 2 /* Original value was 2 */
344#define CONFIG_SYS_ACTORW 2
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200345#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200346#define CONFIG_SYS_SDMODE_CAS_LAT 2 /* For 100MHz bus */
347/*#define CONFIG_SYS_SDMODE_BURSTLEN 3*/
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200348#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200349#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* For 133MHz bus */
350/*#define CONFIG_SYS_SDMODE_BURSTLEN 2*/
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200351#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200352#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
353#define CONFIG_SYS_EXTROM 1 /* Original setting but there is no EXTROM */
354#define CONFIG_SYS_REGDIMM 0
355#define CONFIG_SYS_DBUS_SIZE2 1
356#define CONFIG_SYS_SDMODE_WRAP 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200357
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200358#define CONFIG_SYS_PGMAX 0x32 /* All boards use this setting. Original 0x92 */
359#define CONFIG_SYS_SDRAM_DSCD 0x30
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200360
361/* Memory bank settings.
362 * Only bits 20-29 are actually used from these vales to set the
363 * start/end addresses. The upper two bits will always be 0, and the lower
364 * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
365 * address. Refer to the MPC8240 book.
366 */
367
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200368#define CONFIG_SYS_BANK0_START 0x00000000
369#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
370#define CONFIG_SYS_BANK0_ENABLE 1
371#define CONFIG_SYS_BANK1_START 0x3ff00000
372#define CONFIG_SYS_BANK1_END 0x3fffffff
373#define CONFIG_SYS_BANK1_ENABLE 0
374#define CONFIG_SYS_BANK2_START 0x3ff00000
375#define CONFIG_SYS_BANK2_END 0x3fffffff
376#define CONFIG_SYS_BANK2_ENABLE 0
377#define CONFIG_SYS_BANK3_START 0x3ff00000
378#define CONFIG_SYS_BANK3_END 0x3fffffff
379#define CONFIG_SYS_BANK3_ENABLE 0
380#define CONFIG_SYS_BANK4_START 0x3ff00000
381#define CONFIG_SYS_BANK4_END 0x3fffffff
382#define CONFIG_SYS_BANK4_ENABLE 0
383#define CONFIG_SYS_BANK5_START 0x3ff00000
384#define CONFIG_SYS_BANK5_END 0x3fffffff
385#define CONFIG_SYS_BANK5_ENABLE 0
386#define CONFIG_SYS_BANK6_START 0x3ff00000
387#define CONFIG_SYS_BANK6_END 0x3fffffff
388#define CONFIG_SYS_BANK6_ENABLE 0
389#define CONFIG_SYS_BANK7_START 0x3ff00000
390#define CONFIG_SYS_BANK7_END 0x3fffffff
391#define CONFIG_SYS_BANK7_ENABLE 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200392
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200393#define CONFIG_SYS_ODCR 0x15
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200394
395/*----------------------------------------------------------------------
396 * Initial BAT mappings
397 */
398
399/* NOTES:
400 * 1) GUARDED and WRITETHROUGH not allowed in IBATS
401 * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT
402 */
403
404/* SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200405#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
406#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200407
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200408#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
409#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200410
411/* EUMB: 1MB of address space */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200412#define CONFIG_SYS_IBAT1L (CONFIG_SYS_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
413#define CONFIG_SYS_IBAT1U (CONFIG_SYS_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200414
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200415#define CONFIG_SYS_DBAT1L (CONFIG_SYS_IBAT1L | BATL_GUARDEDSTORAGE)
416#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200417
418/* PCI Mem: 256MB of address space */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200419#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
420#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200421
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200422#define CONFIG_SYS_DBAT2L (CONFIG_SYS_IBAT2L | BATL_GUARDEDSTORAGE)
423#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200424
425/* PCI and local ROM/Flash: last 32MB of address space */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200426#define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
427#define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP)
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200428
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200429#define CONFIG_SYS_DBAT3L (CONFIG_SYS_IBAT3L | BATL_GUARDEDSTORAGE)
430#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200431
432/*
433 * For booting Linux, the board info and command line data
434 * have to be in the first 8 MB of memory, since this is
435 * the maximum mapped by the Linux kernel during initialization.
436 *
437 * FIXME: This doesn't appear to be true for the newer kernels
438 * which map more that 8 MB
439 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200440#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200441
442/*-----------------------------------------------------------------------
443 * FLASH organization
444 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200445#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200446#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200447
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200448#undef CONFIG_SYS_FLASH_PROTECTION
449#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
450#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
451#define CONFIG_SYS_MAX_FLASH_SECT 72 /* Max number of sectors per flash */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200452
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200453#define CONFIG_SYS_FLASH_ERASE_TOUT 12000
454#define CONFIG_SYS_FLASH_WRITE_TOUT 1000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200455
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200456#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200457
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200458#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
459#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200460
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200461#define CONFIG_ENV_IS_IN_FLASH
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200462/*
463 * The original LinkStation flash organisation uses
464 * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader
465 * We use the last sector of this area to store the environment
466 * which leaves max. 384 kB for the U-Boot itself
467 */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200468#define CONFIG_ENV_ADDR 0xFFF60000
469#define CONFIG_ENV_SIZE 0x00010000
470#define CONFIG_ENV_SECT_SIZE 0x00010000
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200471
472/*-----------------------------------------------------------------------
473 * Cache Configuration
474 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200475#define CONFIG_SYS_CACHELINE_SIZE 32
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200476#ifdef CONFIG_CMD_KGDB
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200477#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200478#endif
479
480/*-----------------------------------------------------------------------
481 * IDE/ATA definitions
482 */
483#undef CONFIG_IDE_LED /* No IDE LED */
484#define CONFIG_IDE_RESET /* no reset for ide supported */
485#define CONFIG_IDE_PREINIT /* check for units */
486#define CONFIG_LBA48 /* 48 bit LBA supported */
487
488#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200489#define CONFIG_SYS_IDE_MAXBUS 1 /* Scan only 1 IDE bus */
490#define CONFIG_SYS_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200491#elif defined(CONFIG_HGTL)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200492#define CONFIG_SYS_IDE_MAXBUS 2 /* Max. 2 IDE busses */
493#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200494#else
495#error Config IDE: Unknown LinkStation type
496#endif
497
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200498#define CONFIG_SYS_ATA_BASE_ADDR 0
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200499
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200500#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for data I/O */
501#define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for normal registers */
502#define CONFIG_SYS_ATA_ALT_OFFSET 0 /* Offset for alternate registers */
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200503
504/*-----------------------------------------------------------------------
505 * Partitions and file system
506 */
507#define CONFIG_DOS_PARTITION
508
Guennadi Liakhovetski40c26b22008-03-31 01:32:15 +0200509#endif /* __CONFIG_H */