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wdenkc6097192002-11-03 00:24:07 +00001/*
Marek Vasutac737ff2011-08-28 03:35:13 +02002 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 *
wdenkc6097192002-11-03 00:24:07 +00004 * (C) Copyright 2002
5 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Alex Zuepke <azu@sysgo.de>
14 *
15 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 *
31 */
32
33#include <common.h>
wdenk5958f4a2003-09-18 09:21:33 +000034#include <watchdog.h>
stefano babic5ab4f032007-08-30 22:57:04 +020035#include <serial.h>
wdenkc6097192002-11-03 00:24:07 +000036#include <asm/arch/pxa-regs.h>
Marek Vasutac737ff2011-08-28 03:35:13 +020037#include <asm/arch/regs-uart.h>
Marek Vasut2db1e962010-09-09 09:50:39 +020038#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000039
Wolfgang Denk6405a152006-03-31 18:32:53 +020040DECLARE_GLOBAL_DATA_PTR;
41
Marek Vasutac737ff2011-08-28 03:35:13 +020042/*
43 * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
44 * easily handle enabling of clock.
45 */
46#ifdef CONFIG_CPU_MONAHANS
47#define UART_CLK_BASE CKENA_21_BTUART
48#define UART_CLK_REG CKENA
49#define BTUART_INDEX 0
50#define FFUART_INDEX 1
51#define STUART_INDEX 2
Marek Vasut85cc88a2011-11-26 07:20:07 +010052#elif CONFIG_CPU_PXA25X
Marek Vasutac737ff2011-08-28 03:35:13 +020053#define UART_CLK_BASE (1 << 4) /* HWUART */
54#define UART_CLK_REG CKEN
55#define HWUART_INDEX 0
56#define STUART_INDEX 1
57#define FFUART_INDEX 2
58#define BTUART_INDEX 3
59#else /* PXA27x */
60#define UART_CLK_BASE CKEN5_STUART
61#define UART_CLK_REG CKEN
62#define STUART_INDEX 0
63#define FFUART_INDEX 1
64#define BTUART_INDEX 2
65#endif
66
67/*
68 * Only PXA250 has HWUART, to avoid poluting the code with more macros,
69 * artificially introduce this.
70 */
Marek Vasut85cc88a2011-11-26 07:20:07 +010071#ifndef CONFIG_CPU_PXA25X
Marek Vasutac737ff2011-08-28 03:35:13 +020072#define HWUART_INDEX 0xff
73#endif
stefano babic5ab4f032007-08-30 22:57:04 +020074
75#ifndef CONFIG_SERIAL_MULTI
Marek Vasutac737ff2011-08-28 03:35:13 +020076#if defined(CONFIG_FFUART)
Marcel Ziswiler53761bc2007-10-19 00:25:33 +020077#define UART_INDEX FFUART_INDEX
Marek Vasutac737ff2011-08-28 03:35:13 +020078#elif defined(CONFIG_BTUART)
Marcel Ziswiler53761bc2007-10-19 00:25:33 +020079#define UART_INDEX BTUART_INDEX
Marek Vasutac737ff2011-08-28 03:35:13 +020080#elif defined(CONFIG_STUART)
Marcel Ziswiler53761bc2007-10-19 00:25:33 +020081#define UART_INDEX STUART_INDEX
Marek Vasutac737ff2011-08-28 03:35:13 +020082#elif defined(CONFIG_HWUART)
83#define UART_INDEX HWUART_INDEX
stefano babic5ab4f032007-08-30 22:57:04 +020084#else
Marek Vasutac737ff2011-08-28 03:35:13 +020085#error "Please select CONFIG_(FF|BT|ST|HW)UART in board config file."
stefano babic5ab4f032007-08-30 22:57:04 +020086#endif
87#endif
88
Marek Vasutac737ff2011-08-28 03:35:13 +020089uint32_t pxa_uart_get_baud_divider(void)
wdenkc6097192002-11-03 00:24:07 +000090{
wdenkc6097192002-11-03 00:24:07 +000091 if (gd->baudrate == 1200)
Marek Vasutac737ff2011-08-28 03:35:13 +020092 return 768;
wdenkc6097192002-11-03 00:24:07 +000093 else if (gd->baudrate == 9600)
Marek Vasutac737ff2011-08-28 03:35:13 +020094 return 96;
wdenkc6097192002-11-03 00:24:07 +000095 else if (gd->baudrate == 19200)
Marek Vasutac737ff2011-08-28 03:35:13 +020096 return 48;
wdenkc6097192002-11-03 00:24:07 +000097 else if (gd->baudrate == 38400)
Marek Vasutac737ff2011-08-28 03:35:13 +020098 return 24;
wdenkc6097192002-11-03 00:24:07 +000099 else if (gd->baudrate == 57600)
Marek Vasutac737ff2011-08-28 03:35:13 +0200100 return 16;
wdenkc6097192002-11-03 00:24:07 +0000101 else if (gd->baudrate == 115200)
Marek Vasutac737ff2011-08-28 03:35:13 +0200102 return 8;
103 else /* Unsupported baudrate */
104 return 0;
105}
wdenkc6097192002-11-03 00:24:07 +0000106
Marek Vasutac737ff2011-08-28 03:35:13 +0200107struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index)
108{
stefano babic5ab4f032007-08-30 22:57:04 +0200109 switch (uart_index) {
Marek Vasutac737ff2011-08-28 03:35:13 +0200110 case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
111 case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
112 case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
113 case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
114 default:
115 return NULL;
116 }
117}
wdenkc6097192002-11-03 00:24:07 +0000118
Marek Vasutac737ff2011-08-28 03:35:13 +0200119void pxa_uart_toggle_clock(uint32_t uart_index, int enable)
120{
121 uint32_t clk_reg, clk_offset, reg;
wdenkc6097192002-11-03 00:24:07 +0000122
Marek Vasutac737ff2011-08-28 03:35:13 +0200123 clk_reg = UART_CLK_REG;
124 clk_offset = UART_CLK_BASE << uart_index;
wdenkc6097192002-11-03 00:24:07 +0000125
Marek Vasutac737ff2011-08-28 03:35:13 +0200126 reg = readl(clk_reg);
wdenkc6097192002-11-03 00:24:07 +0000127
Marek Vasutac737ff2011-08-28 03:35:13 +0200128 if (enable)
129 reg |= clk_offset;
130 else
131 reg &= ~clk_offset;
wdenkb02744a2003-04-05 00:53:31 +0000132
Marek Vasutac737ff2011-08-28 03:35:13 +0200133 writel(reg, clk_reg);
134}
wdenkb02744a2003-04-05 00:53:31 +0000135
Marek Vasutac737ff2011-08-28 03:35:13 +0200136/*
137 * Enable clock and set baud rate, parity etc.
138 */
139void pxa_setbrg_dev(uint32_t uart_index)
140{
141 uint32_t divider = 0;
142 struct pxa_uart_regs *uart_regs;
wdenkb02744a2003-04-05 00:53:31 +0000143
Marek Vasutac737ff2011-08-28 03:35:13 +0200144 divider = pxa_uart_get_baud_divider();
145 if (!divider)
146 hang();
stefano babic5ab4f032007-08-30 22:57:04 +0200147
Marek Vasutac737ff2011-08-28 03:35:13 +0200148 uart_regs = pxa_uart_index_to_regs(uart_index);
149 if (!uart_regs)
150 hang();
wdenk5958f4a2003-09-18 09:21:33 +0000151
Marek Vasutac737ff2011-08-28 03:35:13 +0200152 pxa_uart_toggle_clock(uart_index, 1);
wdenk5958f4a2003-09-18 09:21:33 +0000153
Marek Vasutac737ff2011-08-28 03:35:13 +0200154 /* Disable interrupts and FIFOs */
155 writel(0, &uart_regs->ier);
156 writel(0, &uart_regs->fcr);
wdenk5958f4a2003-09-18 09:21:33 +0000157
Marek Vasutac737ff2011-08-28 03:35:13 +0200158 /* Set baud rate */
159 writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr);
160 writel(divider & 0xff, &uart_regs->dll);
161 writel(divider >> 8, &uart_regs->dlh);
162 writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr);
wdenk5958f4a2003-09-18 09:21:33 +0000163
Marek Vasutac737ff2011-08-28 03:35:13 +0200164 /* Enable UART */
165 writel(IER_UUE, &uart_regs->ier);
wdenkc6097192002-11-03 00:24:07 +0000166}
167
wdenkc6097192002-11-03 00:24:07 +0000168/*
169 * Initialise the serial port with the given baudrate. The settings
170 * are always 8 data bits, no parity, 1 stop bit, no start bits.
wdenkc6097192002-11-03 00:24:07 +0000171 */
Marek Vasutac737ff2011-08-28 03:35:13 +0200172int pxa_init_dev(unsigned int uart_index)
wdenkc6097192002-11-03 00:24:07 +0000173{
stefano babic5ab4f032007-08-30 22:57:04 +0200174 pxa_setbrg_dev (uart_index);
Marek Vasutac737ff2011-08-28 03:35:13 +0200175 return 0;
wdenkc6097192002-11-03 00:24:07 +0000176}
177
wdenkc6097192002-11-03 00:24:07 +0000178/*
179 * Output a single byte to the serial port.
180 */
Marek Vasutac737ff2011-08-28 03:35:13 +0200181void pxa_putc_dev(unsigned int uart_index, const char c)
wdenkc6097192002-11-03 00:24:07 +0000182{
Marek Vasutac737ff2011-08-28 03:35:13 +0200183 struct pxa_uart_regs *uart_regs;
stefano babic5ab4f032007-08-30 22:57:04 +0200184
Marek Vasutac737ff2011-08-28 03:35:13 +0200185 uart_regs = pxa_uart_index_to_regs(uart_index);
186 if (!uart_regs)
187 hang();
stefano babic5ab4f032007-08-30 22:57:04 +0200188
Marek Vasutac737ff2011-08-28 03:35:13 +0200189 while (!(readl(&uart_regs->lsr) & LSR_TEMT))
190 WATCHDOG_RESET();
191 writel(c, &uart_regs->thr);
wdenkc6097192002-11-03 00:24:07 +0000192
193 /* If \n, also do \r */
194 if (c == '\n')
stefano babic5ab4f032007-08-30 22:57:04 +0200195 pxa_putc_dev (uart_index,'\r');
wdenkc6097192002-11-03 00:24:07 +0000196}
197
198/*
199 * Read a single byte from the serial port. Returns 1 on success, 0
200 * otherwise. When the function is succesfull, the character read is
201 * written into its argument c.
202 */
Marek Vasutac737ff2011-08-28 03:35:13 +0200203int pxa_tstc_dev(unsigned int uart_index)
wdenkc6097192002-11-03 00:24:07 +0000204{
Marek Vasutac737ff2011-08-28 03:35:13 +0200205 struct pxa_uart_regs *uart_regs;
206
207 uart_regs = pxa_uart_index_to_regs(uart_index);
208 if (!uart_regs)
209 return -1;
210
211 return readl(&uart_regs->lsr) & LSR_DR;
wdenkc6097192002-11-03 00:24:07 +0000212}
213
214/*
215 * Read a single byte from the serial port. Returns 1 on success, 0
216 * otherwise. When the function is succesfull, the character read is
217 * written into its argument c.
218 */
Marek Vasutac737ff2011-08-28 03:35:13 +0200219int pxa_getc_dev(unsigned int uart_index)
wdenkc6097192002-11-03 00:24:07 +0000220{
Marek Vasutac737ff2011-08-28 03:35:13 +0200221 struct pxa_uart_regs *uart_regs;
stefano babic5ab4f032007-08-30 22:57:04 +0200222
Marek Vasutac737ff2011-08-28 03:35:13 +0200223 uart_regs = pxa_uart_index_to_regs(uart_index);
224 if (!uart_regs)
225 return -1;
stefano babic5ab4f032007-08-30 22:57:04 +0200226
Marek Vasutac737ff2011-08-28 03:35:13 +0200227 while (!(readl(&uart_regs->lsr) & LSR_DR))
228 WATCHDOG_RESET();
229 return readl(&uart_regs->rbr) & 0xff;
stefano babic5ab4f032007-08-30 22:57:04 +0200230}
231
Marek Vasutac737ff2011-08-28 03:35:13 +0200232void pxa_puts_dev(unsigned int uart_index, const char *s)
stefano babic5ab4f032007-08-30 22:57:04 +0200233{
Marek Vasutac737ff2011-08-28 03:35:13 +0200234 while (*s)
235 pxa_putc_dev(uart_index, *s++);
stefano babic5ab4f032007-08-30 22:57:04 +0200236}
237
Marek Vasutac737ff2011-08-28 03:35:13 +0200238#define pxa_uart(uart, UART) \
239 int uart##_init(void) \
240 { \
241 return pxa_init_dev(UART##_INDEX); \
242 } \
243 \
244 void uart##_setbrg(void) \
245 { \
246 return pxa_setbrg_dev(UART##_INDEX); \
247 } \
248 \
249 void uart##_putc(const char c) \
250 { \
251 return pxa_putc_dev(UART##_INDEX, c); \
252 } \
253 \
254 void uart##_puts(const char *s) \
255 { \
256 return pxa_puts_dev(UART##_INDEX, s); \
257 } \
258 \
259 int uart##_getc(void) \
260 { \
261 return pxa_getc_dev(UART##_INDEX); \
262 } \
263 \
264 int uart##_tstc(void) \
265 { \
266 return pxa_tstc_dev(UART##_INDEX); \
267 } \
stefano babic5ab4f032007-08-30 22:57:04 +0200268
Marek Vasutac737ff2011-08-28 03:35:13 +0200269#define pxa_uart_desc(uart) \
270 struct serial_device serial_##uart##_device = \
271 { \
272 "serial_"#uart, \
273 uart##_init, \
274 NULL, \
275 uart##_setbrg, \
276 uart##_getc, \
277 uart##_tstc, \
278 uart##_putc, \
279 uart##_puts, \
280 };
stefano babic5ab4f032007-08-30 22:57:04 +0200281
Marek Vasutac737ff2011-08-28 03:35:13 +0200282#define pxa_uart_multi(uart, UART) \
283 pxa_uart(uart, UART) \
284 pxa_uart_desc(uart)
stefano babic5ab4f032007-08-30 22:57:04 +0200285
Marek Vasutac737ff2011-08-28 03:35:13 +0200286#if defined(CONFIG_HWUART)
287 pxa_uart_multi(hwuart, HWUART)
stefano babic5ab4f032007-08-30 22:57:04 +0200288#endif
Marek Vasutac737ff2011-08-28 03:35:13 +0200289#if defined(CONFIG_STUART)
290 pxa_uart_multi(stuart, STUART)
stefano babic5ab4f032007-08-30 22:57:04 +0200291#endif
Marek Vasutac737ff2011-08-28 03:35:13 +0200292#if defined(CONFIG_FFUART)
293 pxa_uart_multi(ffuart, FFUART)
stefano babic5ab4f032007-08-30 22:57:04 +0200294#endif
Marek Vasutac737ff2011-08-28 03:35:13 +0200295#if defined(CONFIG_BTUART)
296 pxa_uart_multi(btuart, BTUART)
297#endif
stefano babic5ab4f032007-08-30 22:57:04 +0200298
Marek Vasutac737ff2011-08-28 03:35:13 +0200299#ifndef CONFIG_SERIAL_MULTI
300 pxa_uart(serial, UART)
301#endif