Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2017 Intel Corporation |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include <dt-bindings/gpio/x86-gpio.h> |
| 9 | #include <dt-bindings/interrupt-router/intel-irq.h> |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | /include/ "rtc.dtsi" |
| 13 | /include/ "tsc_timer.dtsi" |
| 14 | |
Simon Glass | bee77f6 | 2020-11-05 06:32:17 -0700 | [diff] [blame] | 15 | #include "smbios.dtsi" |
| 16 | |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 17 | / { |
| 18 | model = "Intel Edison"; |
| 19 | compatible = "intel,edison"; |
| 20 | |
| 21 | aliases { |
Andy Shevchenko | 9b9ca5b | 2019-02-28 10:10:07 +0200 | [diff] [blame] | 22 | serial0 = &serial0; |
| 23 | serial1 = &serial1; |
Andy Shevchenko | 8e9ce29 | 2019-02-28 10:10:06 +0200 | [diff] [blame] | 24 | serial2 = &serial2; |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 25 | }; |
| 26 | |
Simon Glass | b676492 | 2020-09-06 10:35:34 -0600 | [diff] [blame] | 27 | binman: binman { |
| 28 | multiple-images; |
| 29 | }; |
| 30 | |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 31 | chosen { |
Andy Shevchenko | 8e9ce29 | 2019-02-28 10:10:06 +0200 | [diff] [blame] | 32 | stdout-path = &serial2; |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 33 | }; |
| 34 | |
| 35 | cpus { |
| 36 | #address-cells = <1>; |
| 37 | #size-cells = <0>; |
| 38 | |
| 39 | cpu@0 { |
| 40 | device_type = "cpu"; |
| 41 | compatible = "cpu-x86"; |
| 42 | reg = <0>; |
| 43 | intel,apic-id = <0>; |
| 44 | }; |
| 45 | |
| 46 | cpu@1 { |
| 47 | device_type = "cpu"; |
| 48 | compatible = "cpu-x86"; |
| 49 | reg = <1>; |
| 50 | intel,apic-id = <2>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | pci { |
| 55 | compatible = "pci-x86"; |
| 56 | #address-cells = <3>; |
| 57 | #size-cells = <2>; |
| 58 | u-boot,dm-pre-reloc; |
| 59 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 |
| 60 | 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 |
| 61 | 0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
| 62 | }; |
| 63 | |
Andy Shevchenko | 9b9ca5b | 2019-02-28 10:10:07 +0200 | [diff] [blame] | 64 | serial0: serial@ff010080 { |
| 65 | compatible = "intel,mid-uart"; |
| 66 | reg = <0xff010080 0x100>; |
| 67 | reg-shift = <0>; |
| 68 | clock-frequency = <29491200>; |
| 69 | current-speed = <115200>; |
| 70 | }; |
| 71 | |
| 72 | serial1: serial@ff010100 { |
| 73 | compatible = "intel,mid-uart"; |
| 74 | reg = <0xff010100 0x100>; |
| 75 | reg-shift = <0>; |
| 76 | clock-frequency = <29491200>; |
| 77 | current-speed = <115200>; |
| 78 | }; |
| 79 | |
Andy Shevchenko | 8e9ce29 | 2019-02-28 10:10:06 +0200 | [diff] [blame] | 80 | serial2: serial@ff010180 { |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 81 | compatible = "intel,mid-uart"; |
| 82 | reg = <0xff010180 0x100>; |
| 83 | reg-shift = <0>; |
| 84 | clock-frequency = <29491200>; |
| 85 | current-speed = <115200>; |
| 86 | }; |
| 87 | |
| 88 | emmc: mmc@ff3fc000 { |
| 89 | compatible = "intel,sdhci-tangier"; |
| 90 | reg = <0xff3fc000 0x1000>; |
| 91 | }; |
| 92 | |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 93 | sdcard: mmc@ff3fa000 { |
| 94 | compatible = "intel,sdhci-tangier"; |
| 95 | reg = <0xff3fa000 0x1000>; |
| 96 | }; |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 97 | |
| 98 | pmu: power@ff00b000 { |
| 99 | compatible = "intel,pmu-mid"; |
| 100 | reg = <0xff00b000 0x1000>; |
| 101 | }; |
| 102 | |
| 103 | scu: ipc@ff009000 { |
| 104 | compatible = "intel,scu-ipc"; |
| 105 | reg = <0xff009000 0x1000>; |
| 106 | }; |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 107 | |
Andy Shevchenko | d13a8a3 | 2019-06-21 13:28:08 +0300 | [diff] [blame] | 108 | watchdog: wdt@0 { |
| 109 | compatible = "intel,tangier-wdt"; |
| 110 | }; |
| 111 | |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 112 | reset { |
| 113 | compatible = "intel,reset-tangier"; |
| 114 | u-boot,dm-pre-reloc; |
| 115 | }; |
Georgii Staroselskii | d9c7277 | 2018-09-11 13:31:08 +0300 | [diff] [blame] | 116 | |
| 117 | pinctrl { |
| 118 | compatible = "intel,pinctrl-tangier"; |
| 119 | reg = <0xff0c0000 0x8000>; |
| 120 | |
| 121 | /* |
| 122 | * Initial configuration came from the firmware. |
| 123 | * Which quite likely has been used in the phones, where I2C #8, |
| 124 | * that is not part of Atom peripheral, is in use. |
| 125 | * Thus we need to override the leftover. |
| 126 | */ |
| 127 | i2c6_scl@0 { |
| 128 | pad-offset = <111>; |
| 129 | mode-func = <1>; |
| 130 | protected; |
| 131 | }; |
| 132 | i2c6_sda@0 { |
| 133 | pad-offset = <112>; |
| 134 | mode-func = <1>; |
| 135 | protected; |
| 136 | }; |
| 137 | }; |
Andy Shevchenko | d31315d | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 138 | }; |
Simon Glass | b676492 | 2020-09-06 10:35:34 -0600 | [diff] [blame] | 139 | |
| 140 | &binman { |
| 141 | u-boot-edison { |
| 142 | filename = "u-boot-edison.img"; |
| 143 | |
| 144 | /* This is the OSIP */ |
| 145 | blob { |
| 146 | filename = "edison-osip.dat"; |
| 147 | }; |
| 148 | |
| 149 | u-boot { |
| 150 | offset = <0x200>; |
| 151 | }; |
| 152 | |
| 153 | u-boot-env { |
| 154 | offset = <0x200200>; |
| 155 | filename = "edison-environment.txt"; |
| 156 | size = <0x10000>; |
| 157 | fill-byte = [ff]; |
| 158 | }; |
| 159 | |
| 160 | u-boot-env2 { |
| 161 | type = "u-boot-env"; |
| 162 | offset = <0x500200>; |
| 163 | filename = "edison-environment.txt"; |
| 164 | size = <0x10000>; |
| 165 | fill-byte = [ff]; |
| 166 | }; |
| 167 | }; |
| 168 | }; |