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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Shengzhou Liuf13321d2014-03-05 15:04:48 +08002/*
3 * Copyright 2008-2014 Freescale Semiconductor, Inc.
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Shengzhou Liuf13321d2014-03-05 15:04:48 +08007 */
8
9#include <common.h>
10#include <asm/fsl_law.h>
11#include <asm/mmu.h>
12
13struct law_entry law_table[] = {
14 SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
15#ifdef CONFIG_SYS_BMAN_MEM_PHYS
16 SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
17#endif
18#ifdef CONFIG_SYS_QMAN_MEM_PHYS
19 SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
20#endif
21#ifdef CONFIG_SYS_CPLD_BASE_PHYS
22 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
23#endif
24#ifdef CONFIG_SYS_DCSRBAR_PHYS
25 /* Limit DCSR to 32M to access NPC Trace Buffer */
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
27#endif
Tom Rinib4213492022-11-12 17:36:51 -050028#ifdef CFG_SYS_NAND_BASE_PHYS
29 SET_LAW(CFG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
Shengzhou Liuf13321d2014-03-05 15:04:48 +080030#endif
31};
32
33int num_law_entries = ARRAY_SIZE(law_table);