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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Adrian Alonso0c92fff2015-09-02 13:54:16 -05002/*
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 *
Adrian Alonso0c92fff2015-09-02 13:54:16 -05005 * The file use ls102xa/timer.c as a reference.
6 */
7
8#include <common.h>
9#include <asm/io.h>
10#include <div64.h>
11#include <asm/arch/imx-regs.h>
12#include <asm/arch/sys_proto.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020013#include <asm/mach-imx/syscounter.h>
Adrian Alonso0c92fff2015-09-02 13:54:16 -050014
15DECLARE_GLOBAL_DATA_PTR;
16
17/*
18 * This function is intended for SHORT delays only.
19 * It will overflow at around 10 seconds @ 400MHz,
20 * or 20 seconds @ 200MHz.
21 */
22unsigned long usec2ticks(unsigned long usec)
23{
24 ulong ticks;
25
26 if (usec < 1000)
27 ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
28 else
29 ticks = ((usec / 10) * (get_tbclk() / 100000));
30
31 return ticks;
32}
33
34static inline unsigned long long tick_to_time(unsigned long long tick)
35{
36 unsigned long freq;
37
38 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
39
40 tick *= CONFIG_SYS_HZ;
41 do_div(tick, freq);
42
43 return tick;
44}
45
46static inline unsigned long long us_to_tick(unsigned long long usec)
47{
48 unsigned long freq;
49
50 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
51
52 usec = usec * freq + 999999;
53 do_div(usec, 1000000);
54
55 return usec;
56}
57
Rui Miguel Silvad1bb7a02018-09-05 11:56:05 +010058#ifndef CONFIG_SKIP_LOWLEVEL_INIT
Adrian Alonso0c92fff2015-09-02 13:54:16 -050059int timer_init(void)
60{
61 struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
62 unsigned long val, freq;
63
64 freq = CONFIG_SC_TIMER_CLK;
Yasushi SHOJIe3a345c2018-03-08 13:21:10 +090065 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
Adrian Alonso0c92fff2015-09-02 13:54:16 -050066
67 writel(freq, &sctr->cntfid0);
68
69 /* Enable system counter */
70 val = readl(&sctr->cntcr);
71 val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
72 val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
73 writel(val, &sctr->cntcr);
74
75 gd->arch.tbl = 0;
76 gd->arch.tbu = 0;
77
78 return 0;
79}
Rui Miguel Silvad1bb7a02018-09-05 11:56:05 +010080#endif
Adrian Alonso0c92fff2015-09-02 13:54:16 -050081
82unsigned long long get_ticks(void)
83{
84 unsigned long long now;
85
Yasushi SHOJIe3a345c2018-03-08 13:21:10 +090086 asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
Adrian Alonso0c92fff2015-09-02 13:54:16 -050087
88 gd->arch.tbl = (unsigned long)(now & 0xffffffff);
89 gd->arch.tbu = (unsigned long)(now >> 32);
90
91 return now;
92}
93
Adrian Alonso0c92fff2015-09-02 13:54:16 -050094ulong get_timer(ulong base)
95{
Patrick Delaunay9858a602018-10-05 11:33:52 +020096 return tick_to_time(get_ticks()) - base;
Adrian Alonso0c92fff2015-09-02 13:54:16 -050097}
98
99void __udelay(unsigned long usec)
100{
101 unsigned long long tmp;
102 ulong tmo;
103
104 tmo = us_to_tick(usec);
105 tmp = get_ticks() + tmo; /* get current timestamp */
106
107 while (get_ticks() < tmp) /* loop till event */
108 /*NOP*/;
109}
110
111/*
112 * This function is derived from PowerPC code (timebase clock frequency).
113 * On ARM it returns the number of timer ticks per second.
114 */
115ulong get_tbclk(void)
116{
117 unsigned long freq;
118
119 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
120
121 return freq;
122}