| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __MX6_COMMON_H |
| 7 | #define __MX6_COMMON_H |
| 8 | |
| Stefan Agner | be8b7c5 | 2018-01-05 15:08:19 +0100 | [diff] [blame] | 9 | #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) |
| 10 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ |
| 11 | #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK |
| 12 | #else |
| Fabio Estevam | 1340929 | 2014-01-29 17:39:49 -0200 | [diff] [blame] | 13 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 14 | #define CONFIG_SYS_L2_PL310 |
| 15 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE |
| 16 | #endif |
| 17 | |
| Peng Fan | d2d4fcb | 2015-07-20 19:28:26 +0800 | [diff] [blame] | 18 | #endif |
| 19 | #define CONFIG_BOARD_POSTCLK_INIT |
| Ye.Li | 2b7f877 | 2014-10-30 18:20:59 +0800 | [diff] [blame] | 20 | #define CONFIG_MXC_GPT_HCLK |
| Gabriel Huau | 170ceaf | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 21 | |
| Peng Fan | 3783b9b | 2016-01-04 15:27:22 +0800 | [diff] [blame] | 22 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 23 | |
| Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 24 | #include <linux/sizes.h> |
| 25 | #include <asm/arch/imx-regs.h> |
| Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 26 | #include <asm/mach-imx/gpio.h> |
| Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 27 | |
| Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 28 | #ifndef CONFIG_MX6 |
| 29 | #define CONFIG_MX6 |
| 30 | #endif |
| 31 | |
| Gong Qianyu | 52de2e5 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 32 | #define CONFIG_SYS_FSL_CLK |
| Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 33 | |
| Peter Robinson | 3028f62 | 2015-05-22 17:30:47 +0100 | [diff] [blame] | 34 | /* ATAGs */ |
| 35 | #define CONFIG_CMDLINE_TAG |
| 36 | #define CONFIG_SETUP_MEMORY_TAGS |
| 37 | #define CONFIG_INITRD_TAG |
| 38 | #define CONFIG_REVISION_TAG |
| 39 | |
| Peter Robinson | 490a61e | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 40 | /* Boot options */ |
| Fabio Estevam | 1b691df | 2018-01-03 12:33:05 -0200 | [diff] [blame] | 41 | #if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ |
| 42 | defined(CONFIG_MX6SX) || \ |
| 43 | defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) |
| Fabio Estevam | 8c717e5 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 44 | #define CONFIG_LOADADDR 0x82000000 |
| Fabio Estevam | 8c717e5 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 45 | #else |
| Peter Robinson | 490a61e | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 46 | #define CONFIG_LOADADDR 0x12000000 |
| Fabio Estevam | 8c717e5 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 47 | #endif |
| 48 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 49 | |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 50 | /* allow to overwrite serial and ethaddr */ |
| 51 | #define CONFIG_ENV_OVERWRITE |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 52 | |
| 53 | /* Miscellaneous configurable options */ |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 54 | #define CONFIG_SYS_CBSIZE 512 |
| 55 | #define CONFIG_SYS_MAXARGS 32 |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 56 | |
| Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 57 | /* MMC */ |
| Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 58 | |
| Sven Ebenfeld | eba5e33 | 2016-11-06 16:37:55 +0100 | [diff] [blame] | 59 | #ifdef CONFIG_SPL_BUILD |
| 60 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT |
| 61 | #endif |
| Gary Bisson | 70466e4 | 2016-08-25 19:03:18 +0200 | [diff] [blame] | 62 | |
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 63 | #endif |