blob: 2b63dc7e8e87025fdba94257a051c5ca715d69ca [file] [log] [blame]
Vipin KUMAR204ad542010-01-15 19:15:46 +05301/*
2 * (C) Copyright 2009
3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __SPR_NAND_H__
25#define __SPR_NAND_H__
26
27struct fsmc_regs {
28 u32 reserved_1[0x10];
29 u32 genmemctrl_pc;
30 u32 reserved_2;
31 u32 genmemctrl_comm;
32 u32 genmemctrl_attrib;
33 u32 reserved_3;
34 u32 genmemctrl_ecc;
35};
36
37/* genmemctrl_pc register definitions */
38#define FSMC_RESET (1 << 0)
39#define FSMC_WAITON (1 << 1)
40#define FSMC_ENABLE (1 << 2)
41#define FSMC_DEVTYPE_NAND (1 << 3)
42#define FSMC_DEVWID_8 (0 << 4)
43#define FSMC_DEVWID_16 (1 << 4)
44#define FSMC_ECCEN (1 << 6)
45#define FSMC_ECCPLEN_512 (0 << 7)
46#define FSMC_ECCPLEN_256 (1 << 7)
47#define FSMC_TCLR_1 (1 << 9)
48#define FSMC_TAR_1 (1 << 13)
49
50/* genmemctrl_comm register definitions */
51#define FSMC_TSET_0 (0 << 0)
52#define FSMC_TWAIT_6 (6 << 8)
53#define FSMC_THOLD_4 (4 << 16)
54#define FSMC_THIZ_1 (1 << 24)
55
56extern int spear_nand_init(struct nand_chip *nand);
57#endif