Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / b35aa4f7b4ddadb58b2c20e407a95f1480e618b9 / . / dts / upstream / src / powerpc / sam440ep.dts
blob: 7d15f18e1180bbb043be0199b6d91d7247976d04 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1/*
2 * Device Tree Source for ACube Sam440ep based off bamboo.dts code
3 * original copyrights below
4 *
5 * Copyright (c) 2006, 2007 IBM Corp.
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
7 *
8 * Modified from bamboo.dts for sam440ep:
9 * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without
13 * any warranty of any kind, whether express or implied.
14 */
15
16/dts-v1/;
17
18/ {
19 #address-cells = <2>;
20 #size-cells = <1>;
21 model = "acube,sam440ep";
22 compatible = "acube,sam440ep";
23
24 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 serial2 = &UART2;
30 serial3 = &UART3;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 cpu@0 {
38 device_type = "cpu";
39 model = "PowerPC,440EP";
40 reg = <0>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
45 i-cache-size = <32768>;
46 d-cache-size = <32768>;
47 dcr-controller;
48 dcr-access-method = "native";
49 };
50 };
51
52 memory {
53 device_type = "memory";
54 reg = <0 0 0>; /* Filled in by zImage */
55 };
56
57 UIC0: interrupt-controller0 {
58 compatible = "ibm,uic-440ep","ibm,uic";
59 interrupt-controller;
60 cell-index = <0>;
61 dcr-reg = <0x0c0 9>;
62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 };
66
67 UIC1: interrupt-controller1 {
68 compatible = "ibm,uic-440ep","ibm,uic";
69 interrupt-controller;
70 cell-index = <1>;
71 dcr-reg = <0x0d0 9>;
72 #address-cells = <0>;
73 #size-cells = <0>;
74 #interrupt-cells = <2>;
75 interrupts = <0x1e 4 0x1f 4>; /* cascade */
76 interrupt-parent = <&UIC0>;
77 };
78
79 SDR0: sdr {
80 compatible = "ibm,sdr-440ep";
81 dcr-reg = <0x00e 2>;
82 };
83
84 CPR0: cpr {
85 compatible = "ibm,cpr-440ep";
86 dcr-reg = <0x00c 2>;
87 };
88
89 plb {
90 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
91 #address-cells = <2>;
92 #size-cells = <1>;
93 ranges;
94 clock-frequency = <0>; /* Filled in by zImage */
95
96 SDRAM0: sdram {
97 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
98 dcr-reg = <0x010 2>;
99 };
100
101 DMA0: dma {
102 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
103 dcr-reg = <0x100 0x027>;
104 };
105
106 MAL0: mcmal {
107 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
108 dcr-reg = <0x180 0x062>;
109 num-tx-chans = <4>;
110 num-rx-chans = <2>;
111 interrupt-parent = <&MAL0>;
112 interrupts = <0 1 2 3 4>;
113 #interrupt-cells = <1>;
114 #address-cells = <0>;
115 #size-cells = <0>;
116 interrupt-map = </*TXEOB*/ 0 &UIC0 10 4
117 /*RXEOB*/ 1 &UIC0 11 4
118 /*SERR*/ 2 &UIC1 0 4
119 /*TXDE*/ 3 &UIC1 1 4
120 /*RXDE*/ 4 &UIC1 2 4>;
121 };
122
123 POB0: opb {
124 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
128 * bits.
129 */
130 ranges = <0x00000000 0 0x00000000 0x80000000
131 0x80000000 0 0x80000000 0x80000000>;
132 interrupt-parent = <&UIC1>;
133 interrupts = <7 4>;
134 clock-frequency = <0>; /* Filled in by zImage */
135
136 EBC0: ebc {
137 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
138 dcr-reg = <0x012 2>;
139 #address-cells = <2>;
140 #size-cells = <1>;
141 clock-frequency = <0>; /* Filled in by zImage */
142 interrupts = <5 1>;
143 interrupt-parent = <&UIC1>;
144 };
145
146 UART0: serial@ef600300 {
147 device_type = "serial";
148 compatible = "ns16550";
149 reg = <0xef600300 8>;
150 virtual-reg = <0xef600300>;
151 clock-frequency = <0>; /* Filled in by zImage */
152 current-speed = <0x1c200>;
153 interrupt-parent = <&UIC0>;
154 interrupts = <0 4>;
155 };
156
157 UART1: serial@ef600400 {
158 device_type = "serial";
159 compatible = "ns16550";
160 reg = <0xef600400 8>;
161 virtual-reg = <0xef600400>;
162 clock-frequency = <0>;
163 current-speed = <0>;
164 interrupt-parent = <&UIC0>;
165 interrupts = <1 4>;
166 };
167
168 UART2: serial@ef600500 {
169 device_type = "serial";
170 compatible = "ns16550";
171 reg = <0xef600500 8>;
172 virtual-reg = <0xef600500>;
173 clock-frequency = <0>;
174 current-speed = <0>;
175 interrupt-parent = <&UIC0>;
176 interrupts = <3 4>;
177 };
178
179 UART3: serial@ef600600 {
180 device_type = "serial";
181 compatible = "ns16550";
182 reg = <0xef600600 8>;
183 virtual-reg = <0xef600600>;
184 clock-frequency = <0>;
185 current-speed = <0>;
186 interrupt-parent = <&UIC0>;
187 interrupts = <4 4>;
188 };
189
190 IIC0: i2c@ef600700 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
194 index = <0>;
195 reg = <0xef600700 0x14>;
196 interrupt-parent = <&UIC0>;
197 interrupts = <2 4>;
198 rtc@68 {
199 compatible = "st,m41t80";
200 reg = <0x68>;
201 };
202 };
203
204 IIC1: i2c@ef600800 {
205 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
206 index = <5>;
207 reg = <0xef600800 0x14>;
208 interrupt-parent = <&UIC0>;
209 interrupts = <7 4>;
210 };
211
212 ZMII0: emac-zmii@ef600d00 {
213 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
214 reg = <0xef600d00 0xc>;
215 };
216
217 EMAC0: ethernet@ef600e00 {
218 linux,network-index = <0>;
219 device_type = "network";
220 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
221 interrupt-parent = <&UIC1>;
222 interrupts = <0x1c 4 0x1d 4>;
223 reg = <0xef600e00 0x70>;
224 local-mac-address = [000000000000];
225 mal-device = <&MAL0>;
226 mal-tx-channel = <0 1>;
227 mal-rx-channel = <0>;
228 cell-index = <0>;
229 max-frame-size = <0x5dc>;
230 rx-fifo-size = <0x1000>;
231 tx-fifo-size = <0x800>;
232 phy-mode = "rmii";
233 phy-map = <00000000>;
234 zmii-device = <&ZMII0>;
235 zmii-channel = <0>;
236 };
237
238 EMAC1: ethernet@ef600f00 {
239 linux,network-index = <1>;
240 device_type = "network";
241 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
242 interrupt-parent = <&UIC1>;
243 interrupts = <0x1e 4 0x1f 4>;
244 reg = <0xef600f00 0x70>;
245 local-mac-address = [000000000000];
246 mal-device = <&MAL0>;
247 mal-tx-channel = <2 3>;
248 mal-rx-channel = <1>;
249 cell-index = <1>;
250 max-frame-size = <0x5dc>;
251 rx-fifo-size = <0x1000>;
252 tx-fifo-size = <0x800>;
253 phy-mode = "rmii";
254 phy-map = <00000000>;
255 zmii-device = <&ZMII0>;
256 zmii-channel = <1>;
257 };
258 usb@ef601000 {
259 compatible = "ohci-be";
260 reg = <0xef601000 0x80>;
261 interrupts = <8 4 9 4>;
262 interrupt-parent = <&UIC1>;
263 };
264 };
265
266 PCI0: pci@ec000000 {
267 device_type = "pci";
268 #interrupt-cells = <1>;
269 #size-cells = <2>;
270 #address-cells = <3>;
271 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
272 primary;
273 reg = <0 0xeec00000 8 /* Config space access */
274 0 0xeed00000 4 /* IACK */
275 0 0xeed00000 4 /* Special cycle */
276 0 0xef400000 0x40>; /* Internal registers */
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed. Chip supports a second
280 * IO range but we don't use it for now
281 */
282 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
283 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
284
285 /* Inbound 2GB range starting at 0 */
286 dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
287 };
288 };
289
290 chosen {
291 stdout-path = "/plb/opb/serial@ef600300";
292 };
293};