| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * MPC8360E RDK Device Tree Source |
| 4 | * |
| 5 | * Copyright 2006 Freescale Semiconductor Inc. |
| 6 | * Copyright 2007-2008 MontaVista Software, Inc. |
| 7 | * |
| 8 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | / { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <1>; |
| 16 | compatible = "fsl,mpc8360rdk"; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &serial0; |
| 20 | serial1 = &serial1; |
| 21 | serial2 = &serial2; |
| 22 | serial3 = &serial3; |
| 23 | ethernet0 = &enet0; |
| 24 | ethernet1 = &enet1; |
| 25 | ethernet2 = &enet2; |
| 26 | ethernet3 = &enet3; |
| 27 | pci0 = &pci0; |
| 28 | }; |
| 29 | |
| 30 | cpus { |
| 31 | #address-cells = <1>; |
| 32 | #size-cells = <0>; |
| 33 | |
| 34 | PowerPC,8360@0 { |
| 35 | device_type = "cpu"; |
| 36 | reg = <0>; |
| 37 | d-cache-line-size = <32>; |
| 38 | i-cache-line-size = <32>; |
| 39 | d-cache-size = <32768>; |
| 40 | i-cache-size = <32768>; |
| 41 | /* filled by u-boot */ |
| 42 | timebase-frequency = <0>; |
| 43 | bus-frequency = <0>; |
| 44 | clock-frequency = <0>; |
| 45 | }; |
| 46 | }; |
| 47 | |
| 48 | memory { |
| 49 | device_type = "memory"; |
| 50 | /* filled by u-boot */ |
| 51 | reg = <0 0>; |
| 52 | }; |
| 53 | |
| 54 | soc@e0000000 { |
| 55 | #address-cells = <1>; |
| 56 | #size-cells = <1>; |
| 57 | device_type = "soc"; |
| 58 | compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", |
| 59 | "simple-bus"; |
| 60 | ranges = <0 0xe0000000 0x200000>; |
| 61 | reg = <0xe0000000 0x200>; |
| 62 | /* filled by u-boot */ |
| 63 | bus-frequency = <0>; |
| 64 | |
| 65 | wdt@200 { |
| 66 | compatible = "mpc83xx_wdt"; |
| 67 | reg = <0x200 0x100>; |
| 68 | }; |
| 69 | |
| 70 | pmc: power@b00 { |
| 71 | compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; |
| 72 | reg = <0xb00 0x100 0xa00 0x100>; |
| 73 | interrupts = <80 0x8>; |
| 74 | interrupt-parent = <&ipic>; |
| 75 | }; |
| 76 | |
| 77 | i2c@3000 { |
| 78 | #address-cells = <1>; |
| 79 | #size-cells = <0>; |
| 80 | cell-index = <0>; |
| 81 | compatible = "fsl-i2c"; |
| 82 | reg = <0x3000 0x100>; |
| 83 | interrupts = <14 8>; |
| 84 | interrupt-parent = <&ipic>; |
| 85 | dfsrr; |
| 86 | }; |
| 87 | |
| 88 | i2c@3100 { |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; |
| 91 | cell-index = <1>; |
| 92 | compatible = "fsl-i2c"; |
| 93 | reg = <0x3100 0x100>; |
| 94 | interrupts = <16 8>; |
| 95 | interrupt-parent = <&ipic>; |
| 96 | dfsrr; |
| 97 | }; |
| 98 | |
| 99 | serial0: serial@4500 { |
| 100 | device_type = "serial"; |
| 101 | compatible = "fsl,ns16550", "ns16550"; |
| 102 | reg = <0x4500 0x100>; |
| 103 | interrupts = <9 8>; |
| 104 | interrupt-parent = <&ipic>; |
| 105 | /* filled by u-boot */ |
| 106 | clock-frequency = <0>; |
| 107 | }; |
| 108 | |
| 109 | serial1: serial@4600 { |
| 110 | device_type = "serial"; |
| 111 | compatible = "fsl,ns16550", "ns16550"; |
| 112 | reg = <0x4600 0x100>; |
| 113 | interrupts = <10 8>; |
| 114 | interrupt-parent = <&ipic>; |
| 115 | /* filled by u-boot */ |
| 116 | clock-frequency = <0>; |
| 117 | }; |
| 118 | |
| 119 | dma@82a8 { |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <1>; |
| 122 | compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; |
| 123 | reg = <0x82a8 4>; |
| 124 | ranges = <0 0x8100 0x1a8>; |
| 125 | interrupt-parent = <&ipic>; |
| 126 | interrupts = <71 8>; |
| 127 | cell-index = <0>; |
| 128 | dma-channel@0 { |
| 129 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
| 130 | reg = <0 0x80>; |
| 131 | cell-index = <0>; |
| 132 | interrupt-parent = <&ipic>; |
| 133 | interrupts = <71 8>; |
| 134 | }; |
| 135 | dma-channel@80 { |
| 136 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
| 137 | reg = <0x80 0x80>; |
| 138 | cell-index = <1>; |
| 139 | interrupt-parent = <&ipic>; |
| 140 | interrupts = <71 8>; |
| 141 | }; |
| 142 | dma-channel@100 { |
| 143 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
| 144 | reg = <0x100 0x80>; |
| 145 | cell-index = <2>; |
| 146 | interrupt-parent = <&ipic>; |
| 147 | interrupts = <71 8>; |
| 148 | }; |
| 149 | dma-channel@180 { |
| 150 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
| 151 | reg = <0x180 0x28>; |
| 152 | cell-index = <3>; |
| 153 | interrupt-parent = <&ipic>; |
| 154 | interrupts = <71 8>; |
| 155 | }; |
| 156 | }; |
| 157 | |
| 158 | crypto@30000 { |
| 159 | compatible = "fsl,sec2.0"; |
| 160 | reg = <0x30000 0x10000>; |
| 161 | interrupts = <11 0x8>; |
| 162 | interrupt-parent = <&ipic>; |
| 163 | fsl,num-channels = <4>; |
| 164 | fsl,channel-fifo-len = <24>; |
| 165 | fsl,exec-units-mask = <0x7e>; |
| 166 | fsl,descriptor-types-mask = <0x01010ebf>; |
| 167 | sleep = <&pmc 0x03000000>; |
| 168 | }; |
| 169 | |
| 170 | ipic: interrupt-controller@700 { |
| 171 | #address-cells = <0>; |
| 172 | #interrupt-cells = <2>; |
| 173 | compatible = "fsl,pq2pro-pic", "fsl,ipic"; |
| 174 | interrupt-controller; |
| 175 | reg = <0x700 0x100>; |
| 176 | }; |
| 177 | |
| 178 | qe_pio_b: gpio-controller@1418 { |
| 179 | #gpio-cells = <2>; |
| 180 | compatible = "fsl,mpc8360-qe-pario-bank", |
| 181 | "fsl,mpc8323-qe-pario-bank"; |
| 182 | reg = <0x1418 0x18>; |
| 183 | gpio-controller; |
| 184 | }; |
| 185 | |
| 186 | qe_pio_e: gpio-controller@1460 { |
| 187 | #gpio-cells = <2>; |
| 188 | compatible = "fsl,mpc8360-qe-pario-bank", |
| 189 | "fsl,mpc8323-qe-pario-bank"; |
| 190 | reg = <0x1460 0x18>; |
| 191 | gpio-controller; |
| 192 | }; |
| 193 | |
| 194 | qe@100000 { |
| 195 | #address-cells = <1>; |
| 196 | #size-cells = <1>; |
| 197 | device_type = "qe"; |
| 198 | compatible = "fsl,qe", "simple-bus"; |
| 199 | ranges = <0 0x100000 0x100000>; |
| 200 | reg = <0x100000 0x480>; |
| 201 | /* filled by u-boot */ |
| 202 | clock-frequency = <0>; |
| 203 | bus-frequency = <0>; |
| 204 | brg-frequency = <0>; |
| 205 | fsl,qe-num-riscs = <2>; |
| 206 | fsl,qe-num-snums = <28>; |
| 207 | |
| 208 | muram@10000 { |
| 209 | #address-cells = <1>; |
| 210 | #size-cells = <1>; |
| 211 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; |
| 212 | ranges = <0 0x10000 0xc000>; |
| 213 | |
| 214 | data-only@0 { |
| 215 | compatible = "fsl,qe-muram-data", |
| 216 | "fsl,cpm-muram-data"; |
| 217 | reg = <0 0xc000>; |
| 218 | }; |
| 219 | }; |
| 220 | |
| 221 | timer@440 { |
| 222 | compatible = "fsl,mpc8360-qe-gtm", |
| 223 | "fsl,qe-gtm", "fsl,gtm"; |
| 224 | reg = <0x440 0x40>; |
| 225 | interrupts = <12 13 14 15>; |
| 226 | interrupt-parent = <&qeic>; |
| 227 | clock-frequency = <166666666>; |
| 228 | }; |
| 229 | |
| 230 | usb@6c0 { |
| 231 | compatible = "fsl,mpc8360-qe-usb", |
| 232 | "fsl,mpc8323-qe-usb"; |
| 233 | reg = <0x6c0 0x40 0x8b00 0x100>; |
| 234 | interrupts = <11>; |
| 235 | interrupt-parent = <&qeic>; |
| 236 | fsl,fullspeed-clock = "clk21"; |
| 237 | gpios = <&qe_pio_b 2 0 /* USBOE */ |
| 238 | &qe_pio_b 3 0 /* USBTP */ |
| 239 | &qe_pio_b 8 0 /* USBTN */ |
| 240 | &qe_pio_b 9 0 /* USBRP */ |
| 241 | &qe_pio_b 11 0 /* USBRN */ |
| 242 | &qe_pio_e 20 0 /* SPEED */ |
| 243 | &qe_pio_e 21 1 /* POWER */>; |
| 244 | }; |
| 245 | |
| 246 | spi@4c0 { |
| 247 | cell-index = <0>; |
| 248 | compatible = "fsl,spi"; |
| 249 | reg = <0x4c0 0x40>; |
| 250 | interrupts = <2>; |
| 251 | interrupt-parent = <&qeic>; |
| 252 | mode = "cpu-qe"; |
| 253 | }; |
| 254 | |
| 255 | spi@500 { |
| 256 | cell-index = <1>; |
| 257 | compatible = "fsl,spi"; |
| 258 | reg = <0x500 0x40>; |
| 259 | interrupts = <1>; |
| 260 | interrupt-parent = <&qeic>; |
| 261 | mode = "cpu-qe"; |
| 262 | }; |
| 263 | |
| 264 | enet0: ucc@2000 { |
| 265 | device_type = "network"; |
| 266 | compatible = "ucc_geth"; |
| 267 | cell-index = <1>; |
| 268 | reg = <0x2000 0x200>; |
| 269 | interrupts = <32>; |
| 270 | interrupt-parent = <&qeic>; |
| 271 | rx-clock-name = "none"; |
| 272 | tx-clock-name = "clk9"; |
| 273 | phy-handle = <&phy2>; |
| 274 | phy-connection-type = "rgmii-rxid"; |
| 275 | /* filled by u-boot */ |
| 276 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 277 | }; |
| 278 | |
| 279 | enet1: ucc@3000 { |
| 280 | device_type = "network"; |
| 281 | compatible = "ucc_geth"; |
| 282 | cell-index = <2>; |
| 283 | reg = <0x3000 0x200>; |
| 284 | interrupts = <33>; |
| 285 | interrupt-parent = <&qeic>; |
| 286 | rx-clock-name = "none"; |
| 287 | tx-clock-name = "clk4"; |
| 288 | phy-handle = <&phy4>; |
| 289 | phy-connection-type = "rgmii-rxid"; |
| 290 | /* filled by u-boot */ |
| 291 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 292 | }; |
| 293 | |
| 294 | enet2: ucc@2600 { |
| 295 | device_type = "network"; |
| 296 | compatible = "ucc_geth"; |
| 297 | cell-index = <7>; |
| 298 | reg = <0x2600 0x200>; |
| 299 | interrupts = <42>; |
| 300 | interrupt-parent = <&qeic>; |
| 301 | rx-clock-name = "clk20"; |
| 302 | tx-clock-name = "clk19"; |
| 303 | phy-handle = <&phy1>; |
| 304 | phy-connection-type = "mii"; |
| 305 | /* filled by u-boot */ |
| 306 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 307 | }; |
| 308 | |
| 309 | enet3: ucc@3200 { |
| 310 | device_type = "network"; |
| 311 | compatible = "ucc_geth"; |
| 312 | cell-index = <4>; |
| 313 | reg = <0x3200 0x200>; |
| 314 | interrupts = <35>; |
| 315 | interrupt-parent = <&qeic>; |
| 316 | rx-clock-name = "clk8"; |
| 317 | tx-clock-name = "clk7"; |
| 318 | phy-handle = <&phy3>; |
| 319 | phy-connection-type = "mii"; |
| 320 | /* filled by u-boot */ |
| 321 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 322 | }; |
| 323 | |
| 324 | mdio@2120 { |
| 325 | #address-cells = <1>; |
| 326 | #size-cells = <0>; |
| 327 | compatible = "fsl,ucc-mdio"; |
| 328 | reg = <0x2120 0x18>; |
| 329 | |
| 330 | phy1: ethernet-phy@1 { |
| 331 | compatible = "national,DP83848VV"; |
| 332 | reg = <1>; |
| 333 | }; |
| 334 | |
| 335 | phy2: ethernet-phy@2 { |
| 336 | compatible = "broadcom,BCM5481UA2KMLG"; |
| 337 | reg = <2>; |
| 338 | }; |
| 339 | |
| 340 | phy3: ethernet-phy@3 { |
| 341 | compatible = "national,DP83848VV"; |
| 342 | reg = <3>; |
| 343 | }; |
| 344 | |
| 345 | phy4: ethernet-phy@4 { |
| 346 | compatible = "broadcom,BCM5481UA2KMLG"; |
| 347 | reg = <4>; |
| 348 | }; |
| 349 | }; |
| 350 | |
| 351 | serial2: ucc@2400 { |
| 352 | device_type = "serial"; |
| 353 | compatible = "ucc_uart"; |
| 354 | reg = <0x2400 0x200>; |
| 355 | cell-index = <5>; |
| 356 | port-number = <0>; |
| 357 | rx-clock-name = "brg7"; |
| 358 | tx-clock-name = "brg8"; |
| 359 | interrupts = <40>; |
| 360 | interrupt-parent = <&qeic>; |
| 361 | soft-uart; |
| 362 | }; |
| 363 | |
| 364 | serial3: ucc@3400 { |
| 365 | device_type = "serial"; |
| 366 | compatible = "ucc_uart"; |
| 367 | reg = <0x3400 0x200>; |
| 368 | cell-index = <6>; |
| 369 | port-number = <1>; |
| 370 | rx-clock-name = "brg13"; |
| 371 | tx-clock-name = "brg14"; |
| 372 | interrupts = <41>; |
| 373 | interrupt-parent = <&qeic>; |
| 374 | soft-uart; |
| 375 | }; |
| 376 | |
| 377 | qeic: interrupt-controller@80 { |
| 378 | #address-cells = <0>; |
| 379 | #interrupt-cells = <1>; |
| 380 | compatible = "fsl,qe-ic"; |
| 381 | interrupt-controller; |
| 382 | reg = <0x80 0x80>; |
| 383 | big-endian; |
| 384 | interrupts = <32 8 33 8>; |
| 385 | interrupt-parent = <&ipic>; |
| 386 | }; |
| 387 | }; |
| 388 | }; |
| 389 | |
| 390 | localbus@e0005000 { |
| 391 | #address-cells = <2>; |
| 392 | #size-cells = <1>; |
| 393 | compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", |
| 394 | "simple-bus"; |
| 395 | reg = <0xe0005000 0xd8>; |
| 396 | ranges = <0 0 0xff800000 0x0800000 |
| 397 | 1 0 0x60000000 0x0001000 |
| 398 | 2 0 0x70000000 0x4000000>; |
| 399 | |
| 400 | flash@0,0 { |
| 401 | compatible = "intel,PC28F640P30T85", "cfi-flash"; |
| 402 | reg = <0 0 0x800000>; |
| 403 | bank-width = <2>; |
| 404 | device-width = <1>; |
| 405 | }; |
| 406 | |
| 407 | upm@1,0 { |
| 408 | compatible = "fsl,upm-nand"; |
| 409 | reg = <1 0 1>; |
| 410 | fsl,upm-addr-offset = <16>; |
| 411 | fsl,upm-cmd-offset = <8>; |
| 412 | gpios = <&qe_pio_e 18 0>; |
| 413 | |
| 414 | flash { |
| 415 | compatible = "st,nand512-a"; |
| 416 | }; |
| 417 | }; |
| 418 | |
| 419 | display@2,0 { |
| 420 | device_type = "display"; |
| 421 | compatible = "fujitsu,MB86277", "fujitsu,mint"; |
| 422 | reg = <2 0 0x4000000>; |
| 423 | fujitsu,sh3; |
| 424 | little-endian; |
| 425 | /* filled by u-boot */ |
| 426 | address = <0>; |
| 427 | depth = <0>; |
| 428 | width = <0>; |
| 429 | height = <0>; |
| 430 | linebytes = <0>; |
| 431 | /* linux,opened; - added by uboot */ |
| 432 | }; |
| 433 | }; |
| 434 | |
| 435 | pci0: pci@e0008500 { |
| 436 | #address-cells = <3>; |
| 437 | #size-cells = <2>; |
| 438 | #interrupt-cells = <1>; |
| 439 | device_type = "pci"; |
| 440 | compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; |
| 441 | reg = <0xe0008500 0x100 /* internal registers */ |
| 442 | 0xe0008300 0x8>; /* config space access registers */ |
| 443 | ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 |
| 444 | 0x42000000 0 0x80000000 0x80000000 0 0x10000000 |
| 445 | 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; |
| 446 | interrupts = <66 8>; |
| 447 | interrupt-parent = <&ipic>; |
| 448 | interrupt-map-mask = <0xf800 0 0 7>; |
| 449 | interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ |
| 450 | 0xa000 0 0 1 &ipic 18 8 |
| 451 | 0xa000 0 0 2 &ipic 19 8 |
| 452 | |
| 453 | /* PCI1 IDSEL 0x15 AD21 */ |
| 454 | 0xa800 0 0 1 &ipic 19 8 |
| 455 | 0xa800 0 0 2 &ipic 20 8 |
| 456 | 0xa800 0 0 3 &ipic 21 8 |
| 457 | 0xa800 0 0 4 &ipic 18 8>; |
| 458 | sleep = <&pmc 0x00010000>; |
| 459 | /* filled by u-boot */ |
| 460 | bus-range = <0 0>; |
| 461 | clock-frequency = <0>; |
| 462 | }; |
| 463 | }; |