blob: a04c6ce1e0f686648d971548f99374112a653cdc [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra186 xHCI controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
15
16properties:
17 compatible:
18 const: nvidia,tegra186-xusb
19
20 reg:
21 items:
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24
25 reg-names:
26 items:
27 - const: hcd
28 - const: fpci
29
30 interrupts:
31 items:
32 - description: xHCI host interrupt
33 - description: mailbox interrupt
34
35 clocks:
36 items:
37 - description: XUSB host clock
38 - description: XUSB Falcon source clock
39 - description: XUSB SuperSpeed clock
40 - description: XUSB SuperSpeed source clock
41 - description: XUSB HighSpeed clock source
42 - description: XUSB FullSpeed clock source
43 - description: USB PLL
44 - description: reference clock
45 - description: I/O PLL
46
47 clock-names:
48 items:
49 - const: xusb_host
50 - const: xusb_falcon_src
51 - const: xusb_ss
52 - const: xusb_ss_src
53 - const: xusb_hs_src
54 - const: xusb_fs_src
55 - const: pll_u_480m
56 - const: clk_m
57 - const: pll_e
58
59 interconnects:
60 items:
61 - description: read client
62 - description: write client
63
64 interconnect-names:
65 items:
66 - const: dma-mem # read
67 - const: write
68
69 iommus:
70 maxItems: 1
71
72 nvidia,xusb-padctl:
73 $ref: /schemas/types.yaml#/definitions/phandle
74 description: phandle to the XUSB pad controller that is used to configure
75 the USB pads used by the XHCI controller
76
77 phys:
78 minItems: 1
79 maxItems: 7
80
81 phy-names:
82 minItems: 1
83 maxItems: 7
84 items:
85 enum:
86 - usb2-0
87 - usb2-1
88 - usb2-2
89 - hsic-0
90 - usb3-0
91 - usb3-1
92 - usb3-2
93
94 power-domains:
95 items:
96 - description: XUSBC power domain (for Host and USB 2.0)
97 - description: XUSBA power domain (for SuperSpeed)
98
99 power-domain-names:
100 items:
101 - const: xusb_host
102 - const: xusb_ss
103
104 dvddio-pex-supply:
105 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
106
107 hvddio-pex-supply:
108 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
109
110 avdd-usb-supply:
111 description: USB controller power supply. Must supply 3.3 V.
112
113 avdd-pll-utmip-supply:
114 description: UTMI PLL power supply. Must supply 1.8 V.
115
116 avdd-pll-uerefe-supply:
117 description: PLLE reference PLL power supply. Must supply 1.05 V.
118
119 dvdd-usb-ss-pll-supply:
120 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
121
122 hvdd-usb-ss-pll-e-supply:
123 description: High-voltage PLLE power supply. Must supply 1.8 V.
124
125allOf:
126 - $ref: usb-xhci.yaml
127
128unevaluatedProperties: false
129
130examples:
131 - |
132 #include <dt-bindings/clock/tegra186-clock.h>
133 #include <dt-bindings/interrupt-controller/arm-gic.h>
134 #include <dt-bindings/memory/tegra186-mc.h>
135 #include <dt-bindings/power/tegra186-powergate.h>
136 #include <dt-bindings/reset/tegra186-reset.h>
137
138 usb@3530000 {
139 compatible = "nvidia,tegra186-xusb";
140 reg = <0x03530000 0x8000>,
141 <0x03538000 0x1000>;
142 reg-names = "hcd", "fpci";
143 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
144 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
146 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
147 <&bpmp TEGRA186_CLK_XUSB_SS>,
148 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
149 <&bpmp TEGRA186_CLK_CLK_M>,
150 <&bpmp TEGRA186_CLK_XUSB_FS>,
151 <&bpmp TEGRA186_CLK_PLLU>,
152 <&bpmp TEGRA186_CLK_CLK_M>,
153 <&bpmp TEGRA186_CLK_PLLE>;
154 clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss",
155 "xusb_ss_src", "xusb_hs_src", "xusb_fs_src",
156 "pll_u_480m", "clk_m", "pll_e";
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
158 <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
159 power-domain-names = "xusb_host", "xusb_ss";
160 interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
161 <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
162 interconnect-names = "dma-mem", "write";
163 iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
164 nvidia,xusb-padctl = <&padctl>;
165
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb3_0>;
170 phy-names = "usb2-0", "usb2-1", "usb3-0";
171 };