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git01.mediatek.com / filogic / uboot / b35aa4f7b4ddadb58b2c20e407a95f1480e618b9 / . / dts / upstream / Bindings / usb / amlogic,meson-g12a-usb-ctrl.yaml
blob: da757c1155d4b083a34deb173a0cc01d25eeeab2 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 BayLibre, SAS
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
9
10maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org>
12
13description: |
14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
16 only.
17
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
19
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
21
22 The DWC3 Glue controls the PHY routing and power, an interrupt line is
23 connected to the Glue to serve as OTG ID change detection.
24
25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
26 host-only mode.
27
28 The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
29
30properties:
31 compatible:
32 enum:
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
35 - amlogic,meson-axg-usb-ctrl
36 - amlogic,meson-g12a-usb-ctrl
37 - amlogic,meson-a1-usb-ctrl
38
39 ranges: true
40
41 "#address-cells":
42 enum: [ 1, 2 ]
43
44 "#size-cells":
45 enum: [ 1, 2 ]
46
47 clocks:
48 minItems: 1
49 maxItems: 3
50
51 clock-names:
52 minItems: 1
53 maxItems: 3
54
55 resets:
56 minItems: 1
57
58 reg:
59 maxItems: 1
60
61 interrupts:
62 maxItems: 1
63
64 phy-names:
65 minItems: 1
66 maxItems: 3
67
68 phys:
69 minItems: 1
70 maxItems: 3
71
72 dr_mode: true
73
74 power-domains:
75 maxItems: 1
76
77 vbus-supply:
78 description: VBUS power supply when used in OTG switchable mode
79
80patternProperties:
81 "^usb@[0-9a-f]+$":
82 oneOf:
83 - $ref: dwc2.yaml#
84 - $ref: snps,dwc3.yaml#
85
86additionalProperties: false
87
88required:
89 - compatible
90 - "#address-cells"
91 - "#size-cells"
92 - ranges
93 - clocks
94 - resets
95 - reg
96 - interrupts
97 - phy-names
98 - phys
99 - dr_mode
100
101allOf:
102 - if:
103 properties:
104 compatible:
105 enum:
106 - amlogic,meson-g12a-usb-ctrl
107
108 then:
109 properties:
110 phy-names:
111 minItems: 2
112 items:
113 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
114 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
115 - const: usb3-phy0 # USB3 PHY if USB3_0 is used
116 - if:
117 properties:
118 compatible:
119 enum:
120 - amlogic,meson-gxl-usb-ctrl
121
122 then:
123 properties:
124 clocks:
125 minItems: 2
126 clock-names:
127 items:
128 - const: usb_ctrl
129 - const: ddr
130 phy-names:
131 items:
132 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
133 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
134 required:
135 - clock-names
136 - if:
137 properties:
138 compatible:
139 enum:
140 - amlogic,meson-gxm-usb-ctrl
141
142 then:
143 properties:
144 clocks:
145 minItems: 2
146 clock-names:
147 items:
148 - const: usb_ctrl
149 - const: ddr
150 phy-names:
151 items:
152 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
153 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
154 - const: usb2-phy2 # USB2 PHY2 if USBOTG_C port is used
155
156 required:
157 - clock-names
158 - if:
159 properties:
160 compatible:
161 enum:
162 - amlogic,meson-axg-usb-ctrl
163
164 then:
165 properties:
166 phy-names:
167 items:
168 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
169 clocks:
170 minItems: 2
171 clock-names:
172 items:
173 - const: usb_ctrl
174 - const: ddr
175 required:
176 - clock-names
177 - if:
178 properties:
179 compatible:
180 enum:
181 - amlogic,meson-a1-usb-ctrl
182
183 then:
184 properties:
185 phy-names:
186 items:
187 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
188 clocks:
189 minItems: 3
190 clock-names:
191 items:
192 - const: usb_ctrl
193 - const: usb_bus
194 - const: xtal_usb_ctrl
195 required:
196 - clock-names
197
198examples:
199 - |
200 usb: usb@ffe09000 {
201 compatible = "amlogic,meson-g12a-usb-ctrl";
202 reg = <0xffe09000 0xa0>;
203 interrupts = <16>;
204 #address-cells = <1>;
205 #size-cells = <1>;
206 ranges;
207
208 clocks = <&clkc_usb>;
209 resets = <&reset_usb>;
210
211 dr_mode = "otg";
212
213 phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
214 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
215
216 dwc2: usb@ff400000 {
217 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
218 reg = <0xff400000 0x40000>;
219 interrupts = <31>;
220 clocks = <&clkc_usb1>;
221 clock-names = "otg";
222 phys = <&usb2_phy1>;
223 dr_mode = "peripheral";
224 g-rx-fifo-size = <192>;
225 g-np-tx-fifo-size = <128>;
226 g-tx-fifo-size = <128 128 16 16 16>;
227 };
228
229 dwc3: usb@ff500000 {
230 compatible = "snps,dwc3";
231 reg = <0xff500000 0x100000>;
232 interrupts = <30>;
233 dr_mode = "host";
234 snps,dis_u2_susphy_quirk;
235 snps,quirk-frame-length-adjustment = <0x20>;
236 };
237 };