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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Layerscape Security Fuse Processor
8
9maintainers:
10 - Michael Walle <michael@walle.cc>
11
12description: |
13 SFP is the security fuse processor which among other things provides a
14 unique identifier per part.
15
16allOf:
17 - $ref: nvmem.yaml#
18
19properties:
20 compatible:
21 oneOf:
22 - description: Trust architecture 2.1 SFP
23 items:
24 - const: fsl,ls1021a-sfp
25 - description: Trust architecture 3.0 SFP
26 items:
27 - const: fsl,ls1028a-sfp
28
29 reg:
30 maxItems: 1
31
32 clocks:
33 maxItems: 1
34 description:
35 The SFP clock. Typically, this is the platform clock divided by 4.
36
37 clock-names:
38 const: sfp
39
40 ta-prog-sfp-supply:
41 description:
42 The regulator for the TA_PROG_SFP pin. It will be enabled for programming
43 and disabled for reading.
44
45required:
46 - compatible
47 - reg
48 - clock-names
49 - clocks
50
51unevaluatedProperties: false
52
53examples:
54 - |
55 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
56 efuse@1e80000 {
57 compatible = "fsl,ls1028a-sfp";
58 reg = <0x1e80000 0x8000>;
59 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
60 QORIQ_CLK_PLL_DIV(4)>;
61 clock-names = "sfp";
62 };