| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: STMicroelectronics STM32 Timers |
| 8 | |
| 9 | description: | |
| 10 | This hardware block provides 3 types of timer along with PWM functionality: |
| 11 | - advanced-control timers consist of a 16-bit auto-reload counter driven |
| 12 | by a programmable prescaler, break input feature, PWM outputs and |
| 13 | complementary PWM outputs channels. |
| 14 | - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter |
| 15 | driven by a programmable prescaler and PWM outputs. |
| 16 | - basic timers consist of a 16-bit auto-reload counter driven by a |
| 17 | programmable prescaler. |
| 18 | |
| 19 | maintainers: |
| 20 | - Fabrice Gasnier <fabrice.gasnier@foss.st.com> |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | const: st,stm32-timers |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | clocks: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | clock-names: |
| 33 | items: |
| 34 | - const: int |
| 35 | |
| 36 | resets: |
| 37 | maxItems: 1 |
| 38 | |
| 39 | dmas: |
| 40 | minItems: 1 |
| 41 | maxItems: 7 |
| 42 | |
| 43 | dma-names: |
| 44 | items: |
| 45 | enum: [ ch1, ch2, ch3, ch4, up, trig, com ] |
| 46 | minItems: 1 |
| 47 | maxItems: 7 |
| 48 | |
| 49 | interrupts: |
| 50 | oneOf: |
| 51 | - maxItems: 1 |
| 52 | - maxItems: 4 |
| 53 | |
| 54 | interrupt-names: |
| 55 | oneOf: |
| 56 | - items: |
| 57 | - const: global |
| 58 | - items: |
| 59 | - const: brk |
| 60 | - const: up |
| 61 | - const: trg-com |
| 62 | - const: cc |
| 63 | |
| 64 | "#address-cells": |
| 65 | const: 1 |
| 66 | |
| 67 | "#size-cells": |
| 68 | const: 0 |
| 69 | |
| 70 | pwm: |
| 71 | type: object |
| 72 | additionalProperties: false |
| 73 | |
| 74 | properties: |
| 75 | compatible: |
| 76 | const: st,stm32-pwm |
| 77 | |
| 78 | "#pwm-cells": |
| 79 | const: 3 |
| 80 | |
| 81 | st,breakinput: |
| 82 | description: |
| 83 | One or two <index level filter> to describe break input |
| 84 | configurations. |
| 85 | $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| 86 | items: |
| 87 | items: |
| 88 | - description: | |
| 89 | "index" indicates on which break input (0 or 1) the |
| 90 | configuration should be applied. |
| 91 | enum: [0, 1] |
| 92 | - description: | |
| 93 | "level" gives the active level (0=low or 1=high) of the |
| 94 | input signal for this configuration |
| 95 | enum: [0, 1] |
| 96 | - description: | |
| 97 | "filter" gives the filtering value (up to 15) to be applied. |
| 98 | maximum: 15 |
| 99 | minItems: 1 |
| 100 | maxItems: 2 |
| 101 | |
| 102 | required: |
| 103 | - "#pwm-cells" |
| 104 | - compatible |
| 105 | |
| 106 | counter: |
| 107 | type: object |
| 108 | additionalProperties: false |
| 109 | |
| 110 | properties: |
| 111 | compatible: |
| 112 | const: st,stm32-timer-counter |
| 113 | |
| 114 | required: |
| 115 | - compatible |
| 116 | |
| 117 | patternProperties: |
| 118 | "^timer@[0-9]+$": |
| 119 | type: object |
| 120 | additionalProperties: false |
| 121 | |
| 122 | properties: |
| 123 | compatible: |
| 124 | enum: |
| 125 | - st,stm32-timer-trigger |
| 126 | - st,stm32h7-timer-trigger |
| 127 | |
| 128 | reg: |
| 129 | description: Identify trigger hardware block. |
| 130 | items: |
| 131 | minimum: 0 |
| 132 | maximum: 16 |
| 133 | |
| 134 | required: |
| 135 | - compatible |
| 136 | - reg |
| 137 | |
| 138 | required: |
| 139 | - compatible |
| 140 | - reg |
| 141 | - clocks |
| 142 | - clock-names |
| 143 | |
| 144 | additionalProperties: false |
| 145 | |
| 146 | examples: |
| 147 | - | |
| 148 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 149 | timers2: timer@40000000 { |
| 150 | #address-cells = <1>; |
| 151 | #size-cells = <0>; |
| 152 | compatible = "st,stm32-timers"; |
| 153 | reg = <0x40000000 0x400>; |
| 154 | clocks = <&rcc TIM2_K>; |
| 155 | clock-names = "int"; |
| 156 | dmas = <&dmamux1 18 0x400 0x1>, |
| 157 | <&dmamux1 19 0x400 0x1>, |
| 158 | <&dmamux1 20 0x400 0x1>, |
| 159 | <&dmamux1 21 0x400 0x1>, |
| 160 | <&dmamux1 22 0x400 0x1>; |
| 161 | dma-names = "ch1", "ch2", "ch3", "ch4", "up"; |
| 162 | pwm { |
| 163 | compatible = "st,stm32-pwm"; |
| 164 | #pwm-cells = <3>; |
| 165 | st,breakinput = <0 1 5>; |
| 166 | }; |
| 167 | timer@1 { |
| 168 | compatible = "st,stm32-timer-trigger"; |
| 169 | reg = <1>; |
| 170 | }; |
| 171 | counter { |
| 172 | compatible = "st,stm32-timer-counter"; |
| 173 | }; |
| 174 | }; |
| 175 | |
| 176 | ... |