| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/media/rockchip-rga.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Rockchip 2D raster graphic acceleration controller (RGA) |
| 8 | |
| 9 | description: |
| 10 | RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D |
| 11 | graphics operations, such as point/line drawing, image scaling, rotation, |
| 12 | BitBLT, alpha blending and image blur/sharpness. |
| 13 | |
| 14 | maintainers: |
| 15 | - Jacob Chen <jacob-chen@iotwrt.com> |
| 16 | - Ezequiel Garcia <ezequiel@collabora.com> |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | oneOf: |
| 21 | - const: rockchip,rk3288-rga |
| 22 | - const: rockchip,rk3399-rga |
| 23 | - items: |
| 24 | - enum: |
| 25 | - rockchip,rk3228-rga |
| 26 | - rockchip,rk3568-rga |
| 27 | - const: rockchip,rk3288-rga |
| 28 | |
| 29 | reg: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | interrupts: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | clocks: |
| 36 | maxItems: 3 |
| 37 | |
| 38 | clock-names: |
| 39 | items: |
| 40 | - const: aclk |
| 41 | - const: hclk |
| 42 | - const: sclk |
| 43 | |
| 44 | power-domains: |
| 45 | maxItems: 1 |
| 46 | |
| 47 | resets: |
| 48 | maxItems: 3 |
| 49 | |
| 50 | reset-names: |
| 51 | items: |
| 52 | - const: core |
| 53 | - const: axi |
| 54 | - const: ahb |
| 55 | |
| 56 | required: |
| 57 | - compatible |
| 58 | - reg |
| 59 | - interrupts |
| 60 | - clocks |
| 61 | - clock-names |
| 62 | - resets |
| 63 | - reset-names |
| 64 | |
| 65 | additionalProperties: false |
| 66 | |
| 67 | examples: |
| 68 | - | |
| 69 | #include <dt-bindings/clock/rk3399-cru.h> |
| 70 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 71 | #include <dt-bindings/power/rk3399-power.h> |
| 72 | rga: rga@ff680000 { |
| 73 | compatible = "rockchip,rk3399-rga"; |
| 74 | reg = <0xff680000 0x10000>; |
| 75 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| 76 | clocks = <&cru ACLK_RGA>, |
| 77 | <&cru HCLK_RGA>, |
| 78 | <&cru SCLK_RGA_CORE>; |
| 79 | clock-names = "aclk", "hclk", "sclk"; |
| 80 | power-domains = <&power RK3399_PD_RGA>; |
| 81 | resets = <&cru SRST_RGA_CORE>, |
| 82 | <&cru SRST_A_RGA>, |
| 83 | <&cru SRST_H_RGA>; |
| 84 | reset-names = "core", "axi", "ahb"; |
| 85 | }; |